diff options
author | Pierre Ossman <drzeus@drzeus.cx> | 2007-02-11 13:57:36 -0500 |
---|---|---|
committer | Pierre Ossman <drzeus@drzeus.cx> | 2007-05-01 07:04:17 -0400 |
commit | 1c6a0718f0bfdab0d9b7da5f7b74f38a0058c03a (patch) | |
tree | 5e7f2a26d5d1782d87c596b40f874c6c0b8b8e1a /drivers/mmc/host/wbsd.h | |
parent | 98ac2162699f7e9880683cb954891817f20b607c (diff) |
mmc: Move host and card drivers to subdirs
Clean up the drivers/mmc directory by moving card and host drivers
into subdirectories.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Diffstat (limited to 'drivers/mmc/host/wbsd.h')
-rw-r--r-- | drivers/mmc/host/wbsd.h | 185 |
1 files changed, 185 insertions, 0 deletions
diff --git a/drivers/mmc/host/wbsd.h b/drivers/mmc/host/wbsd.h new file mode 100644 index 00000000000..873bda1e59b --- /dev/null +++ b/drivers/mmc/host/wbsd.h | |||
@@ -0,0 +1,185 @@ | |||
1 | /* | ||
2 | * linux/drivers/mmc/wbsd.h - Winbond W83L51xD SD/MMC driver | ||
3 | * | ||
4 | * Copyright (C) 2004-2007 Pierre Ossman, All Rights Reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or (at | ||
9 | * your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #define LOCK_CODE 0xAA | ||
13 | |||
14 | #define WBSD_CONF_SWRST 0x02 | ||
15 | #define WBSD_CONF_DEVICE 0x07 | ||
16 | #define WBSD_CONF_ID_HI 0x20 | ||
17 | #define WBSD_CONF_ID_LO 0x21 | ||
18 | #define WBSD_CONF_POWER 0x22 | ||
19 | #define WBSD_CONF_PME 0x23 | ||
20 | #define WBSD_CONF_PMES 0x24 | ||
21 | |||
22 | #define WBSD_CONF_ENABLE 0x30 | ||
23 | #define WBSD_CONF_PORT_HI 0x60 | ||
24 | #define WBSD_CONF_PORT_LO 0x61 | ||
25 | #define WBSD_CONF_IRQ 0x70 | ||
26 | #define WBSD_CONF_DRQ 0x74 | ||
27 | |||
28 | #define WBSD_CONF_PINS 0xF0 | ||
29 | |||
30 | #define DEVICE_SD 0x03 | ||
31 | |||
32 | #define WBSD_PINS_DAT3_HI 0x20 | ||
33 | #define WBSD_PINS_DAT3_OUT 0x10 | ||
34 | #define WBSD_PINS_GP11_HI 0x04 | ||
35 | #define WBSD_PINS_DETECT_GP11 0x02 | ||
36 | #define WBSD_PINS_DETECT_DAT3 0x01 | ||
37 | |||
38 | #define WBSD_CMDR 0x00 | ||
39 | #define WBSD_DFR 0x01 | ||
40 | #define WBSD_EIR 0x02 | ||
41 | #define WBSD_ISR 0x03 | ||
42 | #define WBSD_FSR 0x04 | ||
43 | #define WBSD_IDXR 0x05 | ||
44 | #define WBSD_DATAR 0x06 | ||
45 | #define WBSD_CSR 0x07 | ||
46 | |||
47 | #define WBSD_EINT_CARD 0x40 | ||
48 | #define WBSD_EINT_FIFO_THRE 0x20 | ||
49 | #define WBSD_EINT_CRC 0x10 | ||
50 | #define WBSD_EINT_TIMEOUT 0x08 | ||
51 | #define WBSD_EINT_PROGEND 0x04 | ||
52 | #define WBSD_EINT_BUSYEND 0x02 | ||
53 | #define WBSD_EINT_TC 0x01 | ||
54 | |||
55 | #define WBSD_INT_PENDING 0x80 | ||
56 | #define WBSD_INT_CARD 0x40 | ||
57 | #define WBSD_INT_FIFO_THRE 0x20 | ||
58 | #define WBSD_INT_CRC 0x10 | ||
59 | #define WBSD_INT_TIMEOUT 0x08 | ||
60 | #define WBSD_INT_PROGEND 0x04 | ||
61 | #define WBSD_INT_BUSYEND 0x02 | ||
62 | #define WBSD_INT_TC 0x01 | ||
63 | |||
64 | #define WBSD_FIFO_EMPTY 0x80 | ||
65 | #define WBSD_FIFO_FULL 0x40 | ||
66 | #define WBSD_FIFO_EMTHRE 0x20 | ||
67 | #define WBSD_FIFO_FUTHRE 0x10 | ||
68 | #define WBSD_FIFO_SZMASK 0x0F | ||
69 | |||
70 | #define WBSD_MSLED 0x20 | ||
71 | #define WBSD_POWER_N 0x10 | ||
72 | #define WBSD_WRPT 0x04 | ||
73 | #define WBSD_CARDPRESENT 0x01 | ||
74 | |||
75 | #define WBSD_IDX_CLK 0x01 | ||
76 | #define WBSD_IDX_PBSMSB 0x02 | ||
77 | #define WBSD_IDX_TAAC 0x03 | ||
78 | #define WBSD_IDX_NSAC 0x04 | ||
79 | #define WBSD_IDX_PBSLSB 0x05 | ||
80 | #define WBSD_IDX_SETUP 0x06 | ||
81 | #define WBSD_IDX_DMA 0x07 | ||
82 | #define WBSD_IDX_FIFOEN 0x08 | ||
83 | #define WBSD_IDX_STATUS 0x10 | ||
84 | #define WBSD_IDX_RSPLEN 0x1E | ||
85 | #define WBSD_IDX_RESP0 0x1F | ||
86 | #define WBSD_IDX_RESP1 0x20 | ||
87 | #define WBSD_IDX_RESP2 0x21 | ||
88 | #define WBSD_IDX_RESP3 0x22 | ||
89 | #define WBSD_IDX_RESP4 0x23 | ||
90 | #define WBSD_IDX_RESP5 0x24 | ||
91 | #define WBSD_IDX_RESP6 0x25 | ||
92 | #define WBSD_IDX_RESP7 0x26 | ||
93 | #define WBSD_IDX_RESP8 0x27 | ||
94 | #define WBSD_IDX_RESP9 0x28 | ||
95 | #define WBSD_IDX_RESP10 0x29 | ||
96 | #define WBSD_IDX_RESP11 0x2A | ||
97 | #define WBSD_IDX_RESP12 0x2B | ||
98 | #define WBSD_IDX_RESP13 0x2C | ||
99 | #define WBSD_IDX_RESP14 0x2D | ||
100 | #define WBSD_IDX_RESP15 0x2E | ||
101 | #define WBSD_IDX_RESP16 0x2F | ||
102 | #define WBSD_IDX_CRCSTATUS 0x30 | ||
103 | #define WBSD_IDX_ISR 0x3F | ||
104 | |||
105 | #define WBSD_CLK_375K 0x00 | ||
106 | #define WBSD_CLK_12M 0x01 | ||
107 | #define WBSD_CLK_16M 0x02 | ||
108 | #define WBSD_CLK_24M 0x03 | ||
109 | |||
110 | #define WBSD_DATA_WIDTH 0x01 | ||
111 | |||
112 | #define WBSD_DAT3_H 0x08 | ||
113 | #define WBSD_FIFO_RESET 0x04 | ||
114 | #define WBSD_SOFT_RESET 0x02 | ||
115 | #define WBSD_INC_INDEX 0x01 | ||
116 | |||
117 | #define WBSD_DMA_SINGLE 0x02 | ||
118 | #define WBSD_DMA_ENABLE 0x01 | ||
119 | |||
120 | #define WBSD_FIFOEN_EMPTY 0x20 | ||
121 | #define WBSD_FIFOEN_FULL 0x10 | ||
122 | #define WBSD_FIFO_THREMASK 0x0F | ||
123 | |||
124 | #define WBSD_BLOCK_READ 0x80 | ||
125 | #define WBSD_BLOCK_WRITE 0x40 | ||
126 | #define WBSD_BUSY 0x20 | ||
127 | #define WBSD_CARDTRAFFIC 0x04 | ||
128 | #define WBSD_SENDCMD 0x02 | ||
129 | #define WBSD_RECVRES 0x01 | ||
130 | |||
131 | #define WBSD_RSP_SHORT 0x00 | ||
132 | #define WBSD_RSP_LONG 0x01 | ||
133 | |||
134 | #define WBSD_CRC_MASK 0x1F | ||
135 | #define WBSD_CRC_OK 0x05 /* S010E (00101) */ | ||
136 | #define WBSD_CRC_FAIL 0x0B /* S101E (01011) */ | ||
137 | |||
138 | #define WBSD_DMA_SIZE 65536 | ||
139 | |||
140 | struct wbsd_host | ||
141 | { | ||
142 | struct mmc_host* mmc; /* MMC structure */ | ||
143 | |||
144 | spinlock_t lock; /* Mutex */ | ||
145 | |||
146 | int flags; /* Driver states */ | ||
147 | |||
148 | #define WBSD_FCARD_PRESENT (1<<0) /* Card is present */ | ||
149 | #define WBSD_FIGNORE_DETECT (1<<1) /* Ignore card detection */ | ||
150 | |||
151 | struct mmc_request* mrq; /* Current request */ | ||
152 | |||
153 | u8 isr; /* Accumulated ISR */ | ||
154 | |||
155 | struct scatterlist* cur_sg; /* Current SG entry */ | ||
156 | unsigned int num_sg; /* Number of entries left */ | ||
157 | |||
158 | unsigned int offset; /* Offset into current entry */ | ||
159 | unsigned int remain; /* Data left in curren entry */ | ||
160 | |||
161 | char* dma_buffer; /* ISA DMA buffer */ | ||
162 | dma_addr_t dma_addr; /* Physical address for same */ | ||
163 | |||
164 | int firsterr; /* See fifo functions */ | ||
165 | |||
166 | u8 clk; /* Current clock speed */ | ||
167 | unsigned char bus_width; /* Current bus width */ | ||
168 | |||
169 | int config; /* Config port */ | ||
170 | u8 unlock_code; /* Code to unlock config */ | ||
171 | |||
172 | int chip_id; /* ID of controller */ | ||
173 | |||
174 | int base; /* I/O port base */ | ||
175 | int irq; /* Interrupt */ | ||
176 | int dma; /* DMA channel */ | ||
177 | |||
178 | struct tasklet_struct card_tasklet; /* Tasklet structures */ | ||
179 | struct tasklet_struct fifo_tasklet; | ||
180 | struct tasklet_struct crc_tasklet; | ||
181 | struct tasklet_struct timeout_tasklet; | ||
182 | struct tasklet_struct finish_tasklet; | ||
183 | |||
184 | struct timer_list ignore_timer; /* Ignore detection timer */ | ||
185 | }; | ||