aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/mfd
diff options
context:
space:
mode:
authorFlorian Fainelli <florian@openwrt.org>2010-05-15 16:58:27 -0400
committerSamuel Ortiz <sameo@linux.intel.com>2010-05-27 19:37:52 -0400
commit8deca39e5caf7a20fc3786548dc9bfb7f0ae14b6 (patch)
treec3401030a2061731570b12dfe1022ede150460a9 /drivers/mfd
parent380c09f6489f1fd773a697e9e2a156c083a34fc5 (diff)
mfd: Change rdc321x resources flags to IORESOURCE_IO
The rdc321x southbridge PCI device has no MEM PCI resources that we could pass to mfd_add_devices. Since 33254dd5, mfd_add_device checks for the mem_base argument that we set to NULL. Changing the resources passed to our MFD cells from IORESOURCE_MEM to IORESOURCE_IO fixes that. Since we use those resources as offsets to the PCI configuration space base address of the southbridge device this is also more adequate. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers/mfd')
-rw-r--r--drivers/mfd/rdc321x-southbridge.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/mfd/rdc321x-southbridge.c b/drivers/mfd/rdc321x-southbridge.c
index 256dd560bd4..50922975bda 100644
--- a/drivers/mfd/rdc321x-southbridge.c
+++ b/drivers/mfd/rdc321x-southbridge.c
@@ -34,7 +34,7 @@ static struct resource rdc321x_wdt_resource[] = {
34 .name = "wdt-reg", 34 .name = "wdt-reg",
35 .start = RDC321X_WDT_CTRL, 35 .start = RDC321X_WDT_CTRL,
36 .end = RDC321X_WDT_CTRL + 0x3, 36 .end = RDC321X_WDT_CTRL + 0x3,
37 .flags = IORESOURCE_MEM, 37 .flags = IORESOURCE_IO,
38 } 38 }
39}; 39};
40 40
@@ -47,12 +47,12 @@ static struct resource rdc321x_gpio_resources[] = {
47 .name = "gpio-reg1", 47 .name = "gpio-reg1",
48 .start = RDC321X_GPIO_CTRL_REG1, 48 .start = RDC321X_GPIO_CTRL_REG1,
49 .end = RDC321X_GPIO_CTRL_REG1 + 0x7, 49 .end = RDC321X_GPIO_CTRL_REG1 + 0x7,
50 .flags = IORESOURCE_MEM, 50 .flags = IORESOURCE_IO,
51 }, { 51 }, {
52 .name = "gpio-reg2", 52 .name = "gpio-reg2",
53 .start = RDC321X_GPIO_CTRL_REG2, 53 .start = RDC321X_GPIO_CTRL_REG2,
54 .end = RDC321X_GPIO_CTRL_REG2 + 0x7, 54 .end = RDC321X_GPIO_CTRL_REG2 + 0x7,
55 .flags = IORESOURCE_MEM, 55 .flags = IORESOURCE_IO,
56 } 56 }
57}; 57};
58 58