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authorHans Verkuil <hverkuil@xs4all.nl>2007-12-02 05:03:45 -0500
committerMauro Carvalho Chehab <mchehab@infradead.org>2008-01-25 16:03:17 -0500
commit4a56eb3f535f92b0585aa01dba05b3f17a547df0 (patch)
tree796ae3ce9bf9b210342222098c7e78cc1738de74 /drivers/media/video
parent6b1e56763b50f169d8446c43df6adb70f69552db (diff)
V4L/DVB (6743): cx25840: fix endianness inconsistency
cx25840_read4 reads a little-endian 32-bit value whereas cx25840_write4 writes the 32-bit value as big-endian. Convert write4 to use little-endian as well (that's the correct endianness). Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers/media/video')
-rw-r--r--drivers/media/video/cx25840/cx25840-audio.c70
-rw-r--r--drivers/media/video/cx25840/cx25840-core.c8
2 files changed, 39 insertions, 39 deletions
diff --git a/drivers/media/video/cx25840/cx25840-audio.c b/drivers/media/video/cx25840/cx25840-audio.c
index 3d46a776df3..51fc0af0157 100644
--- a/drivers/media/video/cx25840/cx25840-audio.c
+++ b/drivers/media/video/cx25840/cx25840-audio.c
@@ -38,71 +38,71 @@ static int set_audclk_freq(struct i2c_client *client, u32 freq)
38 switch (freq) { 38 switch (freq) {
39 case 32000: 39 case 32000:
40 /* VID_PLL and AUX_PLL */ 40 /* VID_PLL and AUX_PLL */
41 cx25840_write4(client, 0x108, 0x0f040610); 41 cx25840_write4(client, 0x108, 0x1006040f);
42 42
43 /* AUX_PLL_FRAC */ 43 /* AUX_PLL_FRAC */
44 cx25840_write4(client, 0x110, 0xee39bb01); 44 cx25840_write4(client, 0x110, 0x01bb39ee);
45 45
46 if (state->is_cx25836) 46 if (state->is_cx25836)
47 break; 47 break;
48 48
49 /* src3/4/6_ctl = 0x0801f77f */ 49 /* src3/4/6_ctl = 0x0801f77f */
50 cx25840_write4(client, 0x900, 0x7ff70108); 50 cx25840_write4(client, 0x900, 0x0801f77f);
51 cx25840_write4(client, 0x904, 0x7ff70108); 51 cx25840_write4(client, 0x904, 0x0801f77f);
52 cx25840_write4(client, 0x90c, 0x7ff70108); 52 cx25840_write4(client, 0x90c, 0x0801f77f);
53 break; 53 break;
54 54
55 case 44100: 55 case 44100:
56 /* VID_PLL and AUX_PLL */ 56 /* VID_PLL and AUX_PLL */
57 cx25840_write4(client, 0x108, 0x0f040910); 57 cx25840_write4(client, 0x108, 0x1009040f);
58 58
59 /* AUX_PLL_FRAC */ 59 /* AUX_PLL_FRAC */
60 cx25840_write4(client, 0x110, 0xd66bec00); 60 cx25840_write4(client, 0x110, 0x00ec6bd6);
61 61
62 if (state->is_cx25836) 62 if (state->is_cx25836)
63 break; 63 break;
64 64
65 /* src3/4/6_ctl = 0x08016d59 */ 65 /* src3/4/6_ctl = 0x08016d59 */
66 cx25840_write4(client, 0x900, 0x596d0108); 66 cx25840_write4(client, 0x900, 0x08016d59);
67 cx25840_write4(client, 0x904, 0x596d0108); 67 cx25840_write4(client, 0x904, 0x08016d59);
68 cx25840_write4(client, 0x90c, 0x596d0108); 68 cx25840_write4(client, 0x90c, 0x08016d59);
69 break; 69 break;
70 70
71 case 48000: 71 case 48000:
72 /* VID_PLL and AUX_PLL */ 72 /* VID_PLL and AUX_PLL */
73 cx25840_write4(client, 0x108, 0x0f040a10); 73 cx25840_write4(client, 0x108, 0x100a040f);
74 74
75 /* AUX_PLL_FRAC */ 75 /* AUX_PLL_FRAC */
76 cx25840_write4(client, 0x110, 0xe5d69800); 76 cx25840_write4(client, 0x110, 0x0098d6e5);
77 77
78 if (state->is_cx25836) 78 if (state->is_cx25836)
79 break; 79 break;
80 80
81 /* src3/4/6_ctl = 0x08014faa */ 81 /* src3/4/6_ctl = 0x08014faa */
82 cx25840_write4(client, 0x900, 0xaa4f0108); 82 cx25840_write4(client, 0x900, 0x08014faa);
83 cx25840_write4(client, 0x904, 0xaa4f0108); 83 cx25840_write4(client, 0x904, 0x08014faa);
84 cx25840_write4(client, 0x90c, 0xaa4f0108); 84 cx25840_write4(client, 0x90c, 0x08014faa);
85 break; 85 break;
86 } 86 }
87 } else { 87 } else {
88 switch (freq) { 88 switch (freq) {
89 case 32000: 89 case 32000:
90 /* VID_PLL and AUX_PLL */ 90 /* VID_PLL and AUX_PLL */
91 cx25840_write4(client, 0x108, 0x0f04081e); 91 cx25840_write4(client, 0x108, 0x1e08040f);
92 92
93 /* AUX_PLL_FRAC */ 93 /* AUX_PLL_FRAC */
94 cx25840_write4(client, 0x110, 0x69082a01); 94 cx25840_write4(client, 0x110, 0x012a0869);
95 95
96 if (state->is_cx25836) 96 if (state->is_cx25836)
97 break; 97 break;
98 98
99 /* src1_ctl = 0x08010000 */ 99 /* src1_ctl = 0x08010000 */
100 cx25840_write4(client, 0x8f8, 0x00000108); 100 cx25840_write4(client, 0x8f8, 0x08010000);
101 101
102 /* src3/4/6_ctl = 0x08020000 */ 102 /* src3/4/6_ctl = 0x08020000 */
103 cx25840_write4(client, 0x900, 0x00000208); 103 cx25840_write4(client, 0x900, 0x08020000);
104 cx25840_write4(client, 0x904, 0x00000208); 104 cx25840_write4(client, 0x904, 0x08020000);
105 cx25840_write4(client, 0x90c, 0x00000208); 105 cx25840_write4(client, 0x90c, 0x08020000);
106 106
107 /* SA_MCLK_SEL=1, SA_MCLK_DIV=0x14 */ 107 /* SA_MCLK_SEL=1, SA_MCLK_DIV=0x14 */
108 cx25840_write(client, 0x127, 0x54); 108 cx25840_write(client, 0x127, 0x54);
@@ -110,40 +110,40 @@ static int set_audclk_freq(struct i2c_client *client, u32 freq)
110 110
111 case 44100: 111 case 44100:
112 /* VID_PLL and AUX_PLL */ 112 /* VID_PLL and AUX_PLL */
113 cx25840_write4(client, 0x108, 0x0f040918); 113 cx25840_write4(client, 0x108, 0x1809040f);
114 114
115 /* AUX_PLL_FRAC */ 115 /* AUX_PLL_FRAC */
116 cx25840_write4(client, 0x110, 0xd66bec00); 116 cx25840_write4(client, 0x110, 0x00ec6bd6);
117 117
118 if (state->is_cx25836) 118 if (state->is_cx25836)
119 break; 119 break;
120 120
121 /* src1_ctl = 0x08010000 */ 121 /* src1_ctl = 0x08010000 */
122 cx25840_write4(client, 0x8f8, 0xcd600108); 122 cx25840_write4(client, 0x8f8, 0x080160cd);
123 123
124 /* src3/4/6_ctl = 0x08020000 */ 124 /* src3/4/6_ctl = 0x08020000 */
125 cx25840_write4(client, 0x900, 0x85730108); 125 cx25840_write4(client, 0x900, 0x08017385);
126 cx25840_write4(client, 0x904, 0x85730108); 126 cx25840_write4(client, 0x904, 0x08017385);
127 cx25840_write4(client, 0x90c, 0x85730108); 127 cx25840_write4(client, 0x90c, 0x08017385);
128 break; 128 break;
129 129
130 case 48000: 130 case 48000:
131 /* VID_PLL and AUX_PLL */ 131 /* VID_PLL and AUX_PLL */
132 cx25840_write4(client, 0x108, 0x0f040a18); 132 cx25840_write4(client, 0x108, 0x180a040f);
133 133
134 /* AUX_PLL_FRAC */ 134 /* AUX_PLL_FRAC */
135 cx25840_write4(client, 0x110, 0xe5d69800); 135 cx25840_write4(client, 0x110, 0x0098d6e5);
136 136
137 if (state->is_cx25836) 137 if (state->is_cx25836)
138 break; 138 break;
139 139
140 /* src1_ctl = 0x08010000 */ 140 /* src1_ctl = 0x08010000 */
141 cx25840_write4(client, 0x8f8, 0x00800108); 141 cx25840_write4(client, 0x8f8, 0x08018000);
142 142
143 /* src3/4/6_ctl = 0x08020000 */ 143 /* src3/4/6_ctl = 0x08020000 */
144 cx25840_write4(client, 0x900, 0x55550108); 144 cx25840_write4(client, 0x900, 0x08015555);
145 cx25840_write4(client, 0x904, 0x55550108); 145 cx25840_write4(client, 0x904, 0x08015555);
146 cx25840_write4(client, 0x90c, 0x55550108); 146 cx25840_write4(client, 0x90c, 0x08015555);
147 break; 147 break;
148 } 148 }
149 } 149 }
@@ -168,14 +168,14 @@ void cx25840_audio_set_path(struct i2c_client *client)
168 168
169 if (state->aud_input == CX25840_AUDIO_SERIAL) { 169 if (state->aud_input == CX25840_AUDIO_SERIAL) {
170 /* Set Path1 to Serial Audio Input */ 170 /* Set Path1 to Serial Audio Input */
171 cx25840_write4(client, 0x8d0, 0x12100101); 171 cx25840_write4(client, 0x8d0, 0x01011012);
172 172
173 /* The microcontroller should not be started for the 173 /* The microcontroller should not be started for the
174 * non-tuner inputs: autodetection is specific for 174 * non-tuner inputs: autodetection is specific for
175 * TV audio. */ 175 * TV audio. */
176 } else { 176 } else {
177 /* Set Path1 to Analog Demod Main Channel */ 177 /* Set Path1 to Analog Demod Main Channel */
178 cx25840_write4(client, 0x8d0, 0x7038061f); 178 cx25840_write4(client, 0x8d0, 0x1f063870);
179 } 179 }
180 180
181 set_audclk_freq(client, state->audclk_freq); 181 set_audclk_freq(client, state->audclk_freq);
diff --git a/drivers/media/video/cx25840/cx25840-core.c b/drivers/media/video/cx25840/cx25840-core.c
index 6d2ca822a63..0d3d24aff50 100644
--- a/drivers/media/video/cx25840/cx25840-core.c
+++ b/drivers/media/video/cx25840/cx25840-core.c
@@ -73,10 +73,10 @@ int cx25840_write4(struct i2c_client *client, u16 addr, u32 value)
73 u8 buffer[6]; 73 u8 buffer[6];
74 buffer[0] = addr >> 8; 74 buffer[0] = addr >> 8;
75 buffer[1] = addr & 0xff; 75 buffer[1] = addr & 0xff;
76 buffer[2] = value >> 24; 76 buffer[2] = value & 0xff;
77 buffer[3] = (value >> 16) & 0xff; 77 buffer[3] = (value >> 8) & 0xff;
78 buffer[4] = (value >> 8) & 0xff; 78 buffer[4] = (value >> 16) & 0xff;
79 buffer[5] = value & 0xff; 79 buffer[5] = value >> 24;
80 return i2c_master_send(client, buffer, 6); 80 return i2c_master_send(client, buffer, 6);
81} 81}
82 82