diff options
author | Rusty Russell <rusty@rustcorp.com.au> | 2007-07-17 09:34:16 -0400 |
---|---|---|
committer | Avi Kivity <avi@qumranet.com> | 2007-10-13 04:18:18 -0400 |
commit | 66aee91aaab8f998d28a61ed7733be17ad8e6d8f (patch) | |
tree | f3cd552c4a176cbba0929788b03867cb33d7b5b5 /drivers/kvm/kvm.h | |
parent | f802a307cb2cabdd0c6b48067dbe901d6fe27246 (diff) |
KVM: Use standard CR4 flags, tighten checking
On this machine (Intel), writing to the CR4 bits 0x00000800 and
0x00001000 cause a GPF. The Intel manual is a little unclear, but
AFIACT they're reserved, too.
Also fix spelling of CR4_RESEVED_BITS.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Avi Kivity <avi@qumranet.com>
Diffstat (limited to 'drivers/kvm/kvm.h')
-rw-r--r-- | drivers/kvm/kvm.h | 16 |
1 files changed, 5 insertions, 11 deletions
diff --git a/drivers/kvm/kvm.h b/drivers/kvm/kvm.h index 983c33f3837..25439a5968f 100644 --- a/drivers/kvm/kvm.h +++ b/drivers/kvm/kvm.h | |||
@@ -23,12 +23,6 @@ | |||
23 | #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD)) | 23 | #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD)) |
24 | #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS|0xFFFFFF0000000000ULL) | 24 | #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS|0xFFFFFF0000000000ULL) |
25 | 25 | ||
26 | #define CR4_VME_MASK (1ULL << 0) | ||
27 | #define CR4_PSE_MASK (1ULL << 4) | ||
28 | #define CR4_PAE_MASK (1ULL << 5) | ||
29 | #define CR4_PGE_MASK (1ULL << 7) | ||
30 | #define CR4_VMXE_MASK (1ULL << 13) | ||
31 | |||
32 | #define KVM_GUEST_CR0_MASK \ | 26 | #define KVM_GUEST_CR0_MASK \ |
33 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \ | 27 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \ |
34 | | X86_CR0_NW | X86_CR0_CD) | 28 | | X86_CR0_NW | X86_CR0_CD) |
@@ -36,9 +30,9 @@ | |||
36 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \ | 30 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \ |
37 | | X86_CR0_MP) | 31 | | X86_CR0_MP) |
38 | #define KVM_GUEST_CR4_MASK \ | 32 | #define KVM_GUEST_CR4_MASK \ |
39 | (CR4_PSE_MASK | CR4_PAE_MASK | CR4_PGE_MASK | CR4_VMXE_MASK | CR4_VME_MASK) | 33 | (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE) |
40 | #define KVM_PMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK) | 34 | #define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE) |
41 | #define KVM_RMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK | CR4_VME_MASK) | 35 | #define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE) |
42 | 36 | ||
43 | #define INVALID_PAGE (~(hpa_t)0) | 37 | #define INVALID_PAGE (~(hpa_t)0) |
44 | #define UNMAPPED_GVA (~(gpa_t)0) | 38 | #define UNMAPPED_GVA (~(gpa_t)0) |
@@ -645,12 +639,12 @@ static inline int is_long_mode(struct kvm_vcpu *vcpu) | |||
645 | 639 | ||
646 | static inline int is_pae(struct kvm_vcpu *vcpu) | 640 | static inline int is_pae(struct kvm_vcpu *vcpu) |
647 | { | 641 | { |
648 | return vcpu->cr4 & CR4_PAE_MASK; | 642 | return vcpu->cr4 & X86_CR4_PAE; |
649 | } | 643 | } |
650 | 644 | ||
651 | static inline int is_pse(struct kvm_vcpu *vcpu) | 645 | static inline int is_pse(struct kvm_vcpu *vcpu) |
652 | { | 646 | { |
653 | return vcpu->cr4 & CR4_PSE_MASK; | 647 | return vcpu->cr4 & X86_CR4_PSE; |
654 | } | 648 | } |
655 | 649 | ||
656 | static inline int is_paging(struct kvm_vcpu *vcpu) | 650 | static inline int is_paging(struct kvm_vcpu *vcpu) |