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authorSteve Wise <swise@opengridcomputing.com>2010-09-13 12:23:57 -0400
committerRoland Dreier <rolandd@cisco.com>2010-09-28 13:46:35 -0400
commitc6d7b26791a2aefdf97f2af1e93161ed05acd631 (patch)
tree61b9b3af001fe5983aa84034d20e44eb43c039a8 /drivers/infiniband/hw/cxgb4/iw_cxgb4.h
parentaadc4df3087a33ca7fc37f91a024e7b7efdafa75 (diff)
RDMA/cxgb4: Support on-chip SQs
T4 support on-chip SQs to reduce latency. This patch adds support for this in iw_cxgb4: - Manage ocqp memory like other adapter mem resources. - Allocate user mode SQs from ocqp mem if available. - Map ocqp mem to user process using write combining. - Map PCIE_MA_SYNC reg to user process. Bump uverbs ABI. Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband/hw/cxgb4/iw_cxgb4.h')
-rw-r--r--drivers/infiniband/hw/cxgb4/iw_cxgb4.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h
index 77801163cd0..1c269223945 100644
--- a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h
+++ b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h
@@ -112,8 +112,11 @@ struct c4iw_rdev {
112 struct c4iw_dev_ucontext uctx; 112 struct c4iw_dev_ucontext uctx;
113 struct gen_pool *pbl_pool; 113 struct gen_pool *pbl_pool;
114 struct gen_pool *rqt_pool; 114 struct gen_pool *rqt_pool;
115 struct gen_pool *ocqp_pool;
115 u32 flags; 116 u32 flags;
116 struct cxgb4_lld_info lldi; 117 struct cxgb4_lld_info lldi;
118 unsigned long oc_mw_pa;
119 void __iomem *oc_mw_kva;
117}; 120};
118 121
119static inline int c4iw_fatal_error(struct c4iw_rdev *rdev) 122static inline int c4iw_fatal_error(struct c4iw_rdev *rdev)
@@ -675,8 +678,10 @@ int c4iw_init_resource(struct c4iw_rdev *rdev, u32 nr_tpt, u32 nr_pdid);
675int c4iw_init_ctrl_qp(struct c4iw_rdev *rdev); 678int c4iw_init_ctrl_qp(struct c4iw_rdev *rdev);
676int c4iw_pblpool_create(struct c4iw_rdev *rdev); 679int c4iw_pblpool_create(struct c4iw_rdev *rdev);
677int c4iw_rqtpool_create(struct c4iw_rdev *rdev); 680int c4iw_rqtpool_create(struct c4iw_rdev *rdev);
681int c4iw_ocqp_pool_create(struct c4iw_rdev *rdev);
678void c4iw_pblpool_destroy(struct c4iw_rdev *rdev); 682void c4iw_pblpool_destroy(struct c4iw_rdev *rdev);
679void c4iw_rqtpool_destroy(struct c4iw_rdev *rdev); 683void c4iw_rqtpool_destroy(struct c4iw_rdev *rdev);
684void c4iw_ocqp_pool_destroy(struct c4iw_rdev *rdev);
680void c4iw_destroy_resource(struct c4iw_resource *rscp); 685void c4iw_destroy_resource(struct c4iw_resource *rscp);
681int c4iw_destroy_ctrl_qp(struct c4iw_rdev *rdev); 686int c4iw_destroy_ctrl_qp(struct c4iw_rdev *rdev);
682int c4iw_register_device(struct c4iw_dev *dev); 687int c4iw_register_device(struct c4iw_dev *dev);
@@ -742,6 +747,8 @@ u32 c4iw_rqtpool_alloc(struct c4iw_rdev *rdev, int size);
742void c4iw_rqtpool_free(struct c4iw_rdev *rdev, u32 addr, int size); 747void c4iw_rqtpool_free(struct c4iw_rdev *rdev, u32 addr, int size);
743u32 c4iw_pblpool_alloc(struct c4iw_rdev *rdev, int size); 748u32 c4iw_pblpool_alloc(struct c4iw_rdev *rdev, int size);
744void c4iw_pblpool_free(struct c4iw_rdev *rdev, u32 addr, int size); 749void c4iw_pblpool_free(struct c4iw_rdev *rdev, u32 addr, int size);
750u32 c4iw_ocqp_pool_alloc(struct c4iw_rdev *rdev, int size);
751void c4iw_ocqp_pool_free(struct c4iw_rdev *rdev, u32 addr, int size);
745int c4iw_ofld_send(struct c4iw_rdev *rdev, struct sk_buff *skb); 752int c4iw_ofld_send(struct c4iw_rdev *rdev, struct sk_buff *skb);
746void c4iw_flush_hw_cq(struct t4_cq *cq); 753void c4iw_flush_hw_cq(struct t4_cq *cq);
747void c4iw_count_rcqes(struct t4_cq *cq, struct t4_wq *wq, int *count); 754void c4iw_count_rcqes(struct t4_cq *cq, struct t4_wq *wq, int *count);