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authorStefan Richter <stefanr@s5r6.in-berlin.de>2005-12-01 18:51:56 -0500
committerJody McIntyre <scjody@modernduck.com>2005-12-01 18:51:56 -0500
commitd7758461b9a8253f1c125e5907579e0594d29e3b (patch)
tree3273cf3f8a33dd962326d08cb6030e9c6d881f0b /drivers/ieee1394/ieee1394.h
parent14c0fa243b358c24040ff5f44b60c47aaf6430c3 (diff)
ieee1394: add definitions for phy packet constants
Introduce new macros related to phy packets and use them in ieee1394_core and nodemgr. Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de> Signed-off-by: Jody McIntyre <scjody@modernduck.com>
Diffstat (limited to 'drivers/ieee1394/ieee1394.h')
-rw-r--r--drivers/ieee1394/ieee1394.h19
1 files changed, 18 insertions, 1 deletions
diff --git a/drivers/ieee1394/ieee1394.h b/drivers/ieee1394/ieee1394.h
index b634a9bb365..936d776de00 100644
--- a/drivers/ieee1394/ieee1394.h
+++ b/drivers/ieee1394/ieee1394.h
@@ -62,6 +62,7 @@
62extern const char *hpsb_speedto_str[]; 62extern const char *hpsb_speedto_str[];
63 63
64 64
65/* 1394a cable PHY packets */
65#define SELFID_PWRCL_NO_POWER 0x0 66#define SELFID_PWRCL_NO_POWER 0x0
66#define SELFID_PWRCL_PROVIDE_15W 0x1 67#define SELFID_PWRCL_PROVIDE_15W 0x1
67#define SELFID_PWRCL_PROVIDE_30W 0x2 68#define SELFID_PWRCL_PROVIDE_30W 0x2
@@ -76,8 +77,24 @@ extern const char *hpsb_speedto_str[];
76#define SELFID_PORT_NCONN 0x1 77#define SELFID_PORT_NCONN 0x1
77#define SELFID_PORT_NONE 0x0 78#define SELFID_PORT_NONE 0x0
78 79
80#define PHYPACKET_LINKON 0x40000000
81#define PHYPACKET_PHYCONFIG_R 0x00800000
82#define PHYPACKET_PHYCONFIG_T 0x00400000
83#define EXTPHYPACKET_TYPE_PING 0x00000000
84#define EXTPHYPACKET_TYPE_REMOTEACCESS_BASE 0x00040000
85#define EXTPHYPACKET_TYPE_REMOTEACCESS_PAGED 0x00140000
86#define EXTPHYPACKET_TYPE_REMOTEREPLY_BASE 0x000C0000
87#define EXTPHYPACKET_TYPE_REMOTEREPLY_PAGED 0x001C0000
88#define EXTPHYPACKET_TYPE_REMOTECOMMAND 0x00200000
89#define EXTPHYPACKET_TYPE_REMOTECONFIRMATION 0x00280000
90#define EXTPHYPACKET_TYPE_RESUME 0x003C0000
79 91
80/* 1394a PHY bitmasks */ 92#define EXTPHYPACKET_TYPEMASK 0xC0FC0000
93
94#define PHYPACKET_PORT_SHIFT 24
95#define PHYPACKET_GAPCOUNT_SHIFT 16
96
97/* 1394a PHY register map bitmasks */
81#define PHY_00_PHYSICAL_ID 0xFC 98#define PHY_00_PHYSICAL_ID 0xFC
82#define PHY_00_R 0x02 /* Root */ 99#define PHY_00_R 0x02 /* Root */
83#define PHY_00_PS 0x01 /* Power Status*/ 100#define PHY_00_PS 0x01 /* Power Status*/