diff options
author | Alex Deucher <alexdeucher@gmail.com> | 2009-11-10 15:59:44 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2009-12-01 20:36:39 -0500 |
commit | 9b9fe72488a3a637e0550cc888e3f7a8f70e521e (patch) | |
tree | 5739a07ba9a57c58174f79a065e547e92aafe3df /drivers/gpu/drm | |
parent | ab1e9ea08f1e94639b2d21a6bde5b55d31b1deee (diff) |
drm/radeon/kms: clean up i2c
- Change reg/mask names to match what we use internally
and in the bios
- Clarify how i2c over gpio on radeon actually works
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_atombios.c | 16 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_combios.c | 56 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_display.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_i2c.c | 43 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_mode.h | 30 |
5 files changed, 86 insertions, 67 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 2ed88a82093..cd07c0e9122 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
@@ -82,18 +82,18 @@ static inline struct radeon_i2c_bus_rec radeon_lookup_gpio(struct drm_device | |||
82 | 82 | ||
83 | i2c.mask_clk_reg = le16_to_cpu(gpio.usClkMaskRegisterIndex) * 4; | 83 | i2c.mask_clk_reg = le16_to_cpu(gpio.usClkMaskRegisterIndex) * 4; |
84 | i2c.mask_data_reg = le16_to_cpu(gpio.usDataMaskRegisterIndex) * 4; | 84 | i2c.mask_data_reg = le16_to_cpu(gpio.usDataMaskRegisterIndex) * 4; |
85 | i2c.put_clk_reg = le16_to_cpu(gpio.usClkEnRegisterIndex) * 4; | 85 | i2c.en_clk_reg = le16_to_cpu(gpio.usClkEnRegisterIndex) * 4; |
86 | i2c.put_data_reg = le16_to_cpu(gpio.usDataEnRegisterIndex) * 4; | 86 | i2c.en_data_reg = le16_to_cpu(gpio.usDataEnRegisterIndex) * 4; |
87 | i2c.get_clk_reg = le16_to_cpu(gpio.usClkY_RegisterIndex) * 4; | 87 | i2c.y_clk_reg = le16_to_cpu(gpio.usClkY_RegisterIndex) * 4; |
88 | i2c.get_data_reg = le16_to_cpu(gpio.usDataY_RegisterIndex) * 4; | 88 | i2c.y_data_reg = le16_to_cpu(gpio.usDataY_RegisterIndex) * 4; |
89 | i2c.a_clk_reg = le16_to_cpu(gpio.usClkA_RegisterIndex) * 4; | 89 | i2c.a_clk_reg = le16_to_cpu(gpio.usClkA_RegisterIndex) * 4; |
90 | i2c.a_data_reg = le16_to_cpu(gpio.usDataA_RegisterIndex) * 4; | 90 | i2c.a_data_reg = le16_to_cpu(gpio.usDataA_RegisterIndex) * 4; |
91 | i2c.mask_clk_mask = (1 << gpio.ucClkMaskShift); | 91 | i2c.mask_clk_mask = (1 << gpio.ucClkMaskShift); |
92 | i2c.mask_data_mask = (1 << gpio.ucDataMaskShift); | 92 | i2c.mask_data_mask = (1 << gpio.ucDataMaskShift); |
93 | i2c.put_clk_mask = (1 << gpio.ucClkEnShift); | 93 | i2c.en_clk_mask = (1 << gpio.ucClkEnShift); |
94 | i2c.put_data_mask = (1 << gpio.ucDataEnShift); | 94 | i2c.en_data_mask = (1 << gpio.ucDataEnShift); |
95 | i2c.get_clk_mask = (1 << gpio.ucClkY_Shift); | 95 | i2c.y_clk_mask = (1 << gpio.ucClkY_Shift); |
96 | i2c.get_data_mask = (1 << gpio.ucDataY_Shift); | 96 | i2c.y_data_mask = (1 << gpio.ucDataY_Shift); |
97 | i2c.a_clk_mask = (1 << gpio.ucClkA_Shift); | 97 | i2c.a_clk_mask = (1 << gpio.ucClkA_Shift); |
98 | i2c.a_data_mask = (1 << gpio.ucDataA_Shift); | 98 | i2c.a_data_mask = (1 << gpio.ucDataA_Shift); |
99 | i2c.valid = true; | 99 | i2c.valid = true; |
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c index 5253cbf6db1..e2a51de67aa 100644 --- a/drivers/gpu/drm/radeon/radeon_combios.c +++ b/drivers/gpu/drm/radeon/radeon_combios.c | |||
@@ -450,29 +450,29 @@ struct radeon_i2c_bus_rec combios_setup_i2c_bus(int ddc_line) | |||
450 | i2c.mask_data_mask = RADEON_GPIO_EN_0; | 450 | i2c.mask_data_mask = RADEON_GPIO_EN_0; |
451 | i2c.a_clk_mask = RADEON_GPIO_A_1; | 451 | i2c.a_clk_mask = RADEON_GPIO_A_1; |
452 | i2c.a_data_mask = RADEON_GPIO_A_0; | 452 | i2c.a_data_mask = RADEON_GPIO_A_0; |
453 | i2c.put_clk_mask = RADEON_GPIO_EN_1; | 453 | i2c.en_clk_mask = RADEON_GPIO_EN_1; |
454 | i2c.put_data_mask = RADEON_GPIO_EN_0; | 454 | i2c.en_data_mask = RADEON_GPIO_EN_0; |
455 | i2c.get_clk_mask = RADEON_GPIO_Y_1; | 455 | i2c.y_clk_mask = RADEON_GPIO_Y_1; |
456 | i2c.get_data_mask = RADEON_GPIO_Y_0; | 456 | i2c.y_data_mask = RADEON_GPIO_Y_0; |
457 | if ((ddc_line == RADEON_LCD_GPIO_MASK) || | 457 | if ((ddc_line == RADEON_LCD_GPIO_MASK) || |
458 | (ddc_line == RADEON_MDGPIO_EN_REG)) { | 458 | (ddc_line == RADEON_MDGPIO_EN_REG)) { |
459 | i2c.mask_clk_reg = ddc_line; | 459 | i2c.mask_clk_reg = ddc_line; |
460 | i2c.mask_data_reg = ddc_line; | 460 | i2c.mask_data_reg = ddc_line; |
461 | i2c.a_clk_reg = ddc_line; | 461 | i2c.a_clk_reg = ddc_line; |
462 | i2c.a_data_reg = ddc_line; | 462 | i2c.a_data_reg = ddc_line; |
463 | i2c.put_clk_reg = ddc_line; | 463 | i2c.en_clk_reg = ddc_line; |
464 | i2c.put_data_reg = ddc_line; | 464 | i2c.en_data_reg = ddc_line; |
465 | i2c.get_clk_reg = ddc_line + 4; | 465 | i2c.y_clk_reg = ddc_line + 4; |
466 | i2c.get_data_reg = ddc_line + 4; | 466 | i2c.y_data_reg = ddc_line + 4; |
467 | } else { | 467 | } else { |
468 | i2c.mask_clk_reg = ddc_line; | 468 | i2c.mask_clk_reg = ddc_line; |
469 | i2c.mask_data_reg = ddc_line; | 469 | i2c.mask_data_reg = ddc_line; |
470 | i2c.a_clk_reg = ddc_line; | 470 | i2c.a_clk_reg = ddc_line; |
471 | i2c.a_data_reg = ddc_line; | 471 | i2c.a_data_reg = ddc_line; |
472 | i2c.put_clk_reg = ddc_line; | 472 | i2c.en_clk_reg = ddc_line; |
473 | i2c.put_data_reg = ddc_line; | 473 | i2c.en_data_reg = ddc_line; |
474 | i2c.get_clk_reg = ddc_line; | 474 | i2c.y_clk_reg = ddc_line; |
475 | i2c.get_data_reg = ddc_line; | 475 | i2c.y_data_reg = ddc_line; |
476 | } | 476 | } |
477 | 477 | ||
478 | if (ddc_line) | 478 | if (ddc_line) |
@@ -1567,18 +1567,18 @@ static bool radeon_apply_legacy_quirks(struct drm_device *dev, | |||
1567 | ddc_i2c->mask_data_mask = 0x80; | 1567 | ddc_i2c->mask_data_mask = 0x80; |
1568 | ddc_i2c->a_clk_mask = (0x20 << 8); | 1568 | ddc_i2c->a_clk_mask = (0x20 << 8); |
1569 | ddc_i2c->a_data_mask = 0x80; | 1569 | ddc_i2c->a_data_mask = 0x80; |
1570 | ddc_i2c->put_clk_mask = (0x20 << 8); | 1570 | ddc_i2c->en_clk_mask = (0x20 << 8); |
1571 | ddc_i2c->put_data_mask = 0x80; | 1571 | ddc_i2c->en_data_mask = 0x80; |
1572 | ddc_i2c->get_clk_mask = (0x20 << 8); | 1572 | ddc_i2c->y_clk_mask = (0x20 << 8); |
1573 | ddc_i2c->get_data_mask = 0x80; | 1573 | ddc_i2c->y_data_mask = 0x80; |
1574 | ddc_i2c->mask_clk_reg = RADEON_GPIOPAD_MASK; | 1574 | ddc_i2c->mask_clk_reg = RADEON_GPIOPAD_MASK; |
1575 | ddc_i2c->mask_data_reg = RADEON_GPIOPAD_MASK; | 1575 | ddc_i2c->mask_data_reg = RADEON_GPIOPAD_MASK; |
1576 | ddc_i2c->a_clk_reg = RADEON_GPIOPAD_A; | 1576 | ddc_i2c->a_clk_reg = RADEON_GPIOPAD_A; |
1577 | ddc_i2c->a_data_reg = RADEON_GPIOPAD_A; | 1577 | ddc_i2c->a_data_reg = RADEON_GPIOPAD_A; |
1578 | ddc_i2c->put_clk_reg = RADEON_GPIOPAD_EN; | 1578 | ddc_i2c->en_clk_reg = RADEON_GPIOPAD_EN; |
1579 | ddc_i2c->put_data_reg = RADEON_GPIOPAD_EN; | 1579 | ddc_i2c->en_data_reg = RADEON_GPIOPAD_EN; |
1580 | ddc_i2c->get_clk_reg = RADEON_LCD_GPIO_Y_REG; | 1580 | ddc_i2c->y_clk_reg = RADEON_LCD_GPIO_Y_REG; |
1581 | ddc_i2c->get_data_reg = RADEON_LCD_GPIO_Y_REG; | 1581 | ddc_i2c->y_data_reg = RADEON_LCD_GPIO_Y_REG; |
1582 | } | 1582 | } |
1583 | 1583 | ||
1584 | /* Certain IBM chipset RN50s have a BIOS reporting two VGAs, | 1584 | /* Certain IBM chipset RN50s have a BIOS reporting two VGAs, |
@@ -1939,13 +1939,13 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1939 | RBIOS32(lcd_ddc_info + 3); | 1939 | RBIOS32(lcd_ddc_info + 3); |
1940 | ddc_i2c.a_data_mask = | 1940 | ddc_i2c.a_data_mask = |
1941 | RBIOS32(lcd_ddc_info + 7); | 1941 | RBIOS32(lcd_ddc_info + 7); |
1942 | ddc_i2c.put_clk_mask = | 1942 | ddc_i2c.en_clk_mask = |
1943 | RBIOS32(lcd_ddc_info + 3); | 1943 | RBIOS32(lcd_ddc_info + 3); |
1944 | ddc_i2c.put_data_mask = | 1944 | ddc_i2c.en_data_mask = |
1945 | RBIOS32(lcd_ddc_info + 7); | 1945 | RBIOS32(lcd_ddc_info + 7); |
1946 | ddc_i2c.get_clk_mask = | 1946 | ddc_i2c.y_clk_mask = |
1947 | RBIOS32(lcd_ddc_info + 3); | 1947 | RBIOS32(lcd_ddc_info + 3); |
1948 | ddc_i2c.get_data_mask = | 1948 | ddc_i2c.y_data_mask = |
1949 | RBIOS32(lcd_ddc_info + 7); | 1949 | RBIOS32(lcd_ddc_info + 7); |
1950 | break; | 1950 | break; |
1951 | case DDC_GPIO: | 1951 | case DDC_GPIO: |
@@ -1960,13 +1960,13 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1960 | RBIOS32(lcd_ddc_info + 3); | 1960 | RBIOS32(lcd_ddc_info + 3); |
1961 | ddc_i2c.a_data_mask = | 1961 | ddc_i2c.a_data_mask = |
1962 | RBIOS32(lcd_ddc_info + 7); | 1962 | RBIOS32(lcd_ddc_info + 7); |
1963 | ddc_i2c.put_clk_mask = | 1963 | ddc_i2c.en_clk_mask = |
1964 | RBIOS32(lcd_ddc_info + 3); | 1964 | RBIOS32(lcd_ddc_info + 3); |
1965 | ddc_i2c.put_data_mask = | 1965 | ddc_i2c.en_data_mask = |
1966 | RBIOS32(lcd_ddc_info + 7); | 1966 | RBIOS32(lcd_ddc_info + 7); |
1967 | ddc_i2c.get_clk_mask = | 1967 | ddc_i2c.y_clk_mask = |
1968 | RBIOS32(lcd_ddc_info + 3); | 1968 | RBIOS32(lcd_ddc_info + 3); |
1969 | ddc_i2c.get_data_mask = | 1969 | ddc_i2c.y_data_mask = |
1970 | RBIOS32(lcd_ddc_info + 7); | 1970 | RBIOS32(lcd_ddc_info + 7); |
1971 | break; | 1971 | break; |
1972 | default: | 1972 | default: |
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index a3def191e98..8b117e82e5e 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
@@ -270,10 +270,10 @@ static void radeon_print_display_setup(struct drm_device *dev) | |||
270 | radeon_connector->ddc_bus->rec.mask_data_reg, | 270 | radeon_connector->ddc_bus->rec.mask_data_reg, |
271 | radeon_connector->ddc_bus->rec.a_clk_reg, | 271 | radeon_connector->ddc_bus->rec.a_clk_reg, |
272 | radeon_connector->ddc_bus->rec.a_data_reg, | 272 | radeon_connector->ddc_bus->rec.a_data_reg, |
273 | radeon_connector->ddc_bus->rec.put_clk_reg, | 273 | radeon_connector->ddc_bus->rec.en_clk_reg, |
274 | radeon_connector->ddc_bus->rec.put_data_reg, | 274 | radeon_connector->ddc_bus->rec.en_data_reg, |
275 | radeon_connector->ddc_bus->rec.get_clk_reg, | 275 | radeon_connector->ddc_bus->rec.y_clk_reg, |
276 | radeon_connector->ddc_bus->rec.get_data_reg); | 276 | radeon_connector->ddc_bus->rec.y_data_reg); |
277 | DRM_INFO(" Encoders:\n"); | 277 | DRM_INFO(" Encoders:\n"); |
278 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | 278 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { |
279 | radeon_encoder = to_radeon_encoder(encoder); | 279 | radeon_encoder = to_radeon_encoder(encoder); |
diff --git a/drivers/gpu/drm/radeon/radeon_i2c.c b/drivers/gpu/drm/radeon/radeon_i2c.c index d8296acb082..e97a3912d99 100644 --- a/drivers/gpu/drm/radeon/radeon_i2c.c +++ b/drivers/gpu/drm/radeon/radeon_i2c.c | |||
@@ -78,16 +78,16 @@ void radeon_i2c_do_lock(struct radeon_i2c_chan *i2c, int lock_state) | |||
78 | R200_DVI_I2C_PIN_SEL(R200_SEL_DDC3))); | 78 | R200_DVI_I2C_PIN_SEL(R200_SEL_DDC3))); |
79 | } | 79 | } |
80 | } | 80 | } |
81 | if (lock_state) { | ||
82 | temp = RREG32(rec->a_clk_reg); | ||
83 | temp &= ~(rec->a_clk_mask); | ||
84 | WREG32(rec->a_clk_reg, temp); | ||
85 | |||
86 | temp = RREG32(rec->a_data_reg); | ||
87 | temp &= ~(rec->a_data_mask); | ||
88 | WREG32(rec->a_data_reg, temp); | ||
89 | } | ||
90 | 81 | ||
82 | /* clear the output pin values */ | ||
83 | temp = RREG32(rec->a_clk_reg) & ~rec->a_clk_mask; | ||
84 | WREG32(rec->a_clk_reg, temp); | ||
85 | |||
86 | temp = RREG32(rec->a_data_reg) & ~rec->a_data_mask; | ||
87 | WREG32(rec->a_data_reg, temp); | ||
88 | |||
89 | |||
90 | /* mask the gpio pins for software use */ | ||
91 | temp = RREG32(rec->mask_clk_reg); | 91 | temp = RREG32(rec->mask_clk_reg); |
92 | if (lock_state) | 92 | if (lock_state) |
93 | temp |= rec->mask_clk_mask; | 93 | temp |= rec->mask_clk_mask; |
@@ -112,8 +112,9 @@ static int get_clock(void *i2c_priv) | |||
112 | struct radeon_i2c_bus_rec *rec = &i2c->rec; | 112 | struct radeon_i2c_bus_rec *rec = &i2c->rec; |
113 | uint32_t val; | 113 | uint32_t val; |
114 | 114 | ||
115 | val = RREG32(rec->get_clk_reg); | 115 | /* read the value off the pin */ |
116 | val &= rec->get_clk_mask; | 116 | val = RREG32(rec->y_clk_reg); |
117 | val &= rec->y_clk_mask; | ||
117 | 118 | ||
118 | return (val != 0); | 119 | return (val != 0); |
119 | } | 120 | } |
@@ -126,8 +127,10 @@ static int get_data(void *i2c_priv) | |||
126 | struct radeon_i2c_bus_rec *rec = &i2c->rec; | 127 | struct radeon_i2c_bus_rec *rec = &i2c->rec; |
127 | uint32_t val; | 128 | uint32_t val; |
128 | 129 | ||
129 | val = RREG32(rec->get_data_reg); | 130 | /* read the value off the pin */ |
130 | val &= rec->get_data_mask; | 131 | val = RREG32(rec->y_data_reg); |
132 | val &= rec->y_data_mask; | ||
133 | |||
131 | return (val != 0); | 134 | return (val != 0); |
132 | } | 135 | } |
133 | 136 | ||
@@ -138,9 +141,10 @@ static void set_clock(void *i2c_priv, int clock) | |||
138 | struct radeon_i2c_bus_rec *rec = &i2c->rec; | 141 | struct radeon_i2c_bus_rec *rec = &i2c->rec; |
139 | uint32_t val; | 142 | uint32_t val; |
140 | 143 | ||
141 | val = RREG32(rec->put_clk_reg) & (uint32_t)~(rec->put_clk_mask); | 144 | /* set pin direction */ |
142 | val |= clock ? 0 : rec->put_clk_mask; | 145 | val = RREG32(rec->en_clk_reg) & ~rec->en_clk_mask; |
143 | WREG32(rec->put_clk_reg, val); | 146 | val |= clock ? 0 : rec->en_clk_mask; |
147 | WREG32(rec->en_clk_reg, val); | ||
144 | } | 148 | } |
145 | 149 | ||
146 | static void set_data(void *i2c_priv, int data) | 150 | static void set_data(void *i2c_priv, int data) |
@@ -150,9 +154,10 @@ static void set_data(void *i2c_priv, int data) | |||
150 | struct radeon_i2c_bus_rec *rec = &i2c->rec; | 154 | struct radeon_i2c_bus_rec *rec = &i2c->rec; |
151 | uint32_t val; | 155 | uint32_t val; |
152 | 156 | ||
153 | val = RREG32(rec->put_data_reg) & (uint32_t)~(rec->put_data_mask); | 157 | /* set pin direction */ |
154 | val |= data ? 0 : rec->put_data_mask; | 158 | val = RREG32(rec->en_data_reg) & ~rec->en_data_mask; |
155 | WREG32(rec->put_data_reg, val); | 159 | val |= data ? 0 : rec->en_data_mask; |
160 | WREG32(rec->en_data_reg, val); | ||
156 | } | 161 | } |
157 | 162 | ||
158 | struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, | 163 | struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, |
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h index 491a1ec81a4..20847a2fc4d 100644 --- a/drivers/gpu/drm/radeon/radeon_mode.h +++ b/drivers/gpu/drm/radeon/radeon_mode.h | |||
@@ -89,24 +89,38 @@ enum radeon_tv_std { | |||
89 | TV_STD_PAL_CN, | 89 | TV_STD_PAL_CN, |
90 | }; | 90 | }; |
91 | 91 | ||
92 | /* radeon gpio-based i2c | ||
93 | * 1. "mask" reg and bits | ||
94 | * grabs the gpio pins for software use | ||
95 | * 0=not held 1=held | ||
96 | * 2. "a" reg and bits | ||
97 | * output pin value | ||
98 | * 0=low 1=high | ||
99 | * 3. "en" reg and bits | ||
100 | * sets the pin direction | ||
101 | * 0=input 1=output | ||
102 | * 4. "y" reg and bits | ||
103 | * input pin value | ||
104 | * 0=low 1=high | ||
105 | */ | ||
92 | struct radeon_i2c_bus_rec { | 106 | struct radeon_i2c_bus_rec { |
93 | bool valid; | 107 | bool valid; |
94 | uint32_t mask_clk_reg; | 108 | uint32_t mask_clk_reg; |
95 | uint32_t mask_data_reg; | 109 | uint32_t mask_data_reg; |
96 | uint32_t a_clk_reg; | 110 | uint32_t a_clk_reg; |
97 | uint32_t a_data_reg; | 111 | uint32_t a_data_reg; |
98 | uint32_t put_clk_reg; | 112 | uint32_t en_clk_reg; |
99 | uint32_t put_data_reg; | 113 | uint32_t en_data_reg; |
100 | uint32_t get_clk_reg; | 114 | uint32_t y_clk_reg; |
101 | uint32_t get_data_reg; | 115 | uint32_t y_data_reg; |
102 | uint32_t mask_clk_mask; | 116 | uint32_t mask_clk_mask; |
103 | uint32_t mask_data_mask; | 117 | uint32_t mask_data_mask; |
104 | uint32_t put_clk_mask; | ||
105 | uint32_t put_data_mask; | ||
106 | uint32_t get_clk_mask; | ||
107 | uint32_t get_data_mask; | ||
108 | uint32_t a_clk_mask; | 118 | uint32_t a_clk_mask; |
109 | uint32_t a_data_mask; | 119 | uint32_t a_data_mask; |
120 | uint32_t en_clk_mask; | ||
121 | uint32_t en_data_mask; | ||
122 | uint32_t y_clk_mask; | ||
123 | uint32_t y_data_mask; | ||
110 | }; | 124 | }; |
111 | 125 | ||
112 | struct radeon_tmds_pll { | 126 | struct radeon_tmds_pll { |