diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2010-08-02 20:00:56 -0400 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2010-08-05 18:35:17 -0400 |
commit | 4b223eefe43d201c323d120a01dbd0dcbba64e6d (patch) | |
tree | 324ffff97c55cdfb65dd8c9f5317f4462a6bfd9d /drivers/gpu/drm | |
parent | 2d14e35c950b00bddeba770278f2fe4dfd4355b2 (diff) |
drm/nvc0: starting point for GF100 support, everything stubbed
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r-- | drivers/gpu/drm/nouveau/Makefile | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_drv.h | 41 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_fbcon.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_i2c.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_irq.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_state.c | 51 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvc0_fb.c | 38 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvc0_fifo.c | 96 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvc0_graph.c | 75 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvc0_instmem.c | 79 |
10 files changed, 388 insertions, 6 deletions
diff --git a/drivers/gpu/drm/nouveau/Makefile b/drivers/gpu/drm/nouveau/Makefile index 2405d5ef0ca..e9b06e4ef2a 100644 --- a/drivers/gpu/drm/nouveau/Makefile +++ b/drivers/gpu/drm/nouveau/Makefile | |||
@@ -12,12 +12,12 @@ nouveau-y := nouveau_drv.o nouveau_state.o nouveau_channel.o nouveau_mem.o \ | |||
12 | nouveau_dp.o \ | 12 | nouveau_dp.o \ |
13 | nv04_timer.o \ | 13 | nv04_timer.o \ |
14 | nv04_mc.o nv40_mc.o nv50_mc.o \ | 14 | nv04_mc.o nv40_mc.o nv50_mc.o \ |
15 | nv04_fb.o nv10_fb.o nv30_fb.o nv40_fb.o nv50_fb.o \ | 15 | nv04_fb.o nv10_fb.o nv30_fb.o nv40_fb.o nv50_fb.o nvc0_fb.o \ |
16 | nv04_fifo.o nv10_fifo.o nv40_fifo.o nv50_fifo.o \ | 16 | nv04_fifo.o nv10_fifo.o nv40_fifo.o nv50_fifo.o nvc0_fifo.o \ |
17 | nv04_graph.o nv10_graph.o nv20_graph.o \ | 17 | nv04_graph.o nv10_graph.o nv20_graph.o \ |
18 | nv40_graph.o nv50_graph.o \ | 18 | nv40_graph.o nv50_graph.o nvc0_graph.o \ |
19 | nv40_grctx.o nv50_grctx.o \ | 19 | nv40_grctx.o nv50_grctx.o \ |
20 | nv04_instmem.o nv50_instmem.o \ | 20 | nv04_instmem.o nv50_instmem.o nvc0_instmem.o \ |
21 | nv50_crtc.o nv50_dac.o nv50_sor.o \ | 21 | nv50_crtc.o nv50_dac.o nv50_sor.o \ |
22 | nv50_cursor.o nv50_display.o nv50_fbcon.o \ | 22 | nv50_cursor.o nv50_display.o nv50_fbcon.o \ |
23 | nv04_dac.o nv04_dfp.o nv04_tv.o nv17_tv.o nv17_tv_modes.o \ | 23 | nv04_dac.o nv04_dfp.o nv04_tv.o nv17_tv.o nv17_tv_modes.o \ |
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index 9e17d88bc89..e424bf74d70 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h | |||
@@ -509,6 +509,7 @@ enum nouveau_card_type { | |||
509 | NV_30 = 0x30, | 509 | NV_30 = 0x30, |
510 | NV_40 = 0x40, | 510 | NV_40 = 0x40, |
511 | NV_50 = 0x50, | 511 | NV_50 = 0x50, |
512 | NV_C0 = 0xc0, | ||
512 | }; | 513 | }; |
513 | 514 | ||
514 | struct drm_nouveau_private { | 515 | struct drm_nouveau_private { |
@@ -929,6 +930,10 @@ extern void nv40_fb_set_region_tiling(struct drm_device *, int, uint32_t, | |||
929 | extern int nv50_fb_init(struct drm_device *); | 930 | extern int nv50_fb_init(struct drm_device *); |
930 | extern void nv50_fb_takedown(struct drm_device *); | 931 | extern void nv50_fb_takedown(struct drm_device *); |
931 | 932 | ||
933 | /* nvc0_fb.c */ | ||
934 | extern int nvc0_fb_init(struct drm_device *); | ||
935 | extern void nvc0_fb_takedown(struct drm_device *); | ||
936 | |||
932 | /* nv04_fifo.c */ | 937 | /* nv04_fifo.c */ |
933 | extern int nv04_fifo_init(struct drm_device *); | 938 | extern int nv04_fifo_init(struct drm_device *); |
934 | extern void nv04_fifo_disable(struct drm_device *); | 939 | extern void nv04_fifo_disable(struct drm_device *); |
@@ -966,6 +971,20 @@ extern void nv50_fifo_destroy_context(struct nouveau_channel *); | |||
966 | extern int nv50_fifo_load_context(struct nouveau_channel *); | 971 | extern int nv50_fifo_load_context(struct nouveau_channel *); |
967 | extern int nv50_fifo_unload_context(struct drm_device *); | 972 | extern int nv50_fifo_unload_context(struct drm_device *); |
968 | 973 | ||
974 | /* nvc0_fifo.c */ | ||
975 | extern int nvc0_fifo_init(struct drm_device *); | ||
976 | extern void nvc0_fifo_takedown(struct drm_device *); | ||
977 | extern void nvc0_fifo_disable(struct drm_device *); | ||
978 | extern void nvc0_fifo_enable(struct drm_device *); | ||
979 | extern bool nvc0_fifo_reassign(struct drm_device *, bool); | ||
980 | extern bool nvc0_fifo_cache_flush(struct drm_device *); | ||
981 | extern bool nvc0_fifo_cache_pull(struct drm_device *, bool); | ||
982 | extern int nvc0_fifo_channel_id(struct drm_device *); | ||
983 | extern int nvc0_fifo_create_context(struct nouveau_channel *); | ||
984 | extern void nvc0_fifo_destroy_context(struct nouveau_channel *); | ||
985 | extern int nvc0_fifo_load_context(struct nouveau_channel *); | ||
986 | extern int nvc0_fifo_unload_context(struct drm_device *); | ||
987 | |||
969 | /* nv04_graph.c */ | 988 | /* nv04_graph.c */ |
970 | extern struct nouveau_pgraph_object_class nv04_graph_grclass[]; | 989 | extern struct nouveau_pgraph_object_class nv04_graph_grclass[]; |
971 | extern int nv04_graph_init(struct drm_device *); | 990 | extern int nv04_graph_init(struct drm_device *); |
@@ -1030,6 +1049,16 @@ extern int nv50_graph_unload_context(struct drm_device *); | |||
1030 | extern void nv50_graph_context_switch(struct drm_device *); | 1049 | extern void nv50_graph_context_switch(struct drm_device *); |
1031 | extern int nv50_grctx_init(struct nouveau_grctx *); | 1050 | extern int nv50_grctx_init(struct nouveau_grctx *); |
1032 | 1051 | ||
1052 | /* nvc0_graph.c */ | ||
1053 | extern int nvc0_graph_init(struct drm_device *); | ||
1054 | extern void nvc0_graph_takedown(struct drm_device *); | ||
1055 | extern void nvc0_graph_fifo_access(struct drm_device *, bool); | ||
1056 | extern struct nouveau_channel *nvc0_graph_channel(struct drm_device *); | ||
1057 | extern int nvc0_graph_create_context(struct nouveau_channel *); | ||
1058 | extern void nvc0_graph_destroy_context(struct nouveau_channel *); | ||
1059 | extern int nvc0_graph_load_context(struct nouveau_channel *); | ||
1060 | extern int nvc0_graph_unload_context(struct drm_device *); | ||
1061 | |||
1033 | /* nv04_instmem.c */ | 1062 | /* nv04_instmem.c */ |
1034 | extern int nv04_instmem_init(struct drm_device *); | 1063 | extern int nv04_instmem_init(struct drm_device *); |
1035 | extern void nv04_instmem_takedown(struct drm_device *); | 1064 | extern void nv04_instmem_takedown(struct drm_device *); |
@@ -1056,6 +1085,18 @@ extern void nv50_instmem_flush(struct drm_device *); | |||
1056 | extern void nv84_instmem_flush(struct drm_device *); | 1085 | extern void nv84_instmem_flush(struct drm_device *); |
1057 | extern void nv50_vm_flush(struct drm_device *, int engine); | 1086 | extern void nv50_vm_flush(struct drm_device *, int engine); |
1058 | 1087 | ||
1088 | /* nvc0_instmem.c */ | ||
1089 | extern int nvc0_instmem_init(struct drm_device *); | ||
1090 | extern void nvc0_instmem_takedown(struct drm_device *); | ||
1091 | extern int nvc0_instmem_suspend(struct drm_device *); | ||
1092 | extern void nvc0_instmem_resume(struct drm_device *); | ||
1093 | extern int nvc0_instmem_populate(struct drm_device *, struct nouveau_gpuobj *, | ||
1094 | uint32_t *size); | ||
1095 | extern void nvc0_instmem_clear(struct drm_device *, struct nouveau_gpuobj *); | ||
1096 | extern int nvc0_instmem_bind(struct drm_device *, struct nouveau_gpuobj *); | ||
1097 | extern int nvc0_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *); | ||
1098 | extern void nvc0_instmem_flush(struct drm_device *); | ||
1099 | |||
1059 | /* nv04_mc.c */ | 1100 | /* nv04_mc.c */ |
1060 | extern int nv04_mc_init(struct drm_device *); | 1101 | extern int nv04_mc_init(struct drm_device *); |
1061 | extern void nv04_mc_takedown(struct drm_device *); | 1102 | extern void nv04_mc_takedown(struct drm_device *); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c index 2fb2444d232..11f13fc4697 100644 --- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c +++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c | |||
@@ -280,6 +280,8 @@ nouveau_fbcon_create(struct nouveau_fbdev *nfbdev, | |||
280 | 280 | ||
281 | if (dev_priv->channel && !nouveau_nofbaccel) { | 281 | if (dev_priv->channel && !nouveau_nofbaccel) { |
282 | switch (dev_priv->card_type) { | 282 | switch (dev_priv->card_type) { |
283 | case NV_C0: | ||
284 | break; | ||
283 | case NV_50: | 285 | case NV_50: |
284 | nv50_fbcon_accel_init(info); | 286 | nv50_fbcon_accel_init(info); |
285 | info->fbops = &nv50_fbcon_ops; | 287 | info->fbops = &nv50_fbcon_ops; |
diff --git a/drivers/gpu/drm/nouveau/nouveau_i2c.c b/drivers/gpu/drm/nouveau/nouveau_i2c.c index 9df711fdbbc..0bd407ca3d4 100644 --- a/drivers/gpu/drm/nouveau/nouveau_i2c.c +++ b/drivers/gpu/drm/nouveau/nouveau_i2c.c | |||
@@ -163,7 +163,7 @@ nouveau_i2c_init(struct drm_device *dev, struct dcb_i2c_entry *entry, int index) | |||
163 | if (entry->chan) | 163 | if (entry->chan) |
164 | return -EEXIST; | 164 | return -EEXIST; |
165 | 165 | ||
166 | if (dev_priv->card_type == NV_50 && entry->read >= NV50_I2C_PORTS) { | 166 | if (dev_priv->card_type == NV_C0 && entry->read >= NV50_I2C_PORTS) { |
167 | NV_ERROR(dev, "unknown i2c port %d\n", entry->read); | 167 | NV_ERROR(dev, "unknown i2c port %d\n", entry->read); |
168 | return -EINVAL; | 168 | return -EINVAL; |
169 | } | 169 | } |
diff --git a/drivers/gpu/drm/nouveau/nouveau_irq.c b/drivers/gpu/drm/nouveau/nouveau_irq.c index 0a4a61770df..794b0ee30cf 100644 --- a/drivers/gpu/drm/nouveau/nouveau_irq.c +++ b/drivers/gpu/drm/nouveau/nouveau_irq.c | |||
@@ -49,7 +49,7 @@ nouveau_irq_preinstall(struct drm_device *dev) | |||
49 | /* Master disable */ | 49 | /* Master disable */ |
50 | nv_wr32(dev, NV03_PMC_INTR_EN_0, 0); | 50 | nv_wr32(dev, NV03_PMC_INTR_EN_0, 0); |
51 | 51 | ||
52 | if (dev_priv->card_type == NV_50) { | 52 | if (dev_priv->card_type >= NV_50) { |
53 | INIT_WORK(&dev_priv->irq_work, nv50_display_irq_handler_bh); | 53 | INIT_WORK(&dev_priv->irq_work, nv50_display_irq_handler_bh); |
54 | INIT_WORK(&dev_priv->hpd_work, nv50_display_irq_hotplug_bh); | 54 | INIT_WORK(&dev_priv->hpd_work, nv50_display_irq_hotplug_bh); |
55 | INIT_LIST_HEAD(&dev_priv->vbl_waiting); | 55 | INIT_LIST_HEAD(&dev_priv->vbl_waiting); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c index cf16bfb99c7..989322be372 100644 --- a/drivers/gpu/drm/nouveau/nouveau_state.c +++ b/drivers/gpu/drm/nouveau/nouveau_state.c | |||
@@ -359,6 +359,54 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev) | |||
359 | engine->gpio.set = nv50_gpio_set; | 359 | engine->gpio.set = nv50_gpio_set; |
360 | engine->gpio.irq_enable = nv50_gpio_irq_enable; | 360 | engine->gpio.irq_enable = nv50_gpio_irq_enable; |
361 | break; | 361 | break; |
362 | case 0xC0: | ||
363 | engine->instmem.init = nvc0_instmem_init; | ||
364 | engine->instmem.takedown = nvc0_instmem_takedown; | ||
365 | engine->instmem.suspend = nvc0_instmem_suspend; | ||
366 | engine->instmem.resume = nvc0_instmem_resume; | ||
367 | engine->instmem.populate = nvc0_instmem_populate; | ||
368 | engine->instmem.clear = nvc0_instmem_clear; | ||
369 | engine->instmem.bind = nvc0_instmem_bind; | ||
370 | engine->instmem.unbind = nvc0_instmem_unbind; | ||
371 | engine->instmem.flush = nvc0_instmem_flush; | ||
372 | engine->mc.init = nv50_mc_init; | ||
373 | engine->mc.takedown = nv50_mc_takedown; | ||
374 | engine->timer.init = nv04_timer_init; | ||
375 | engine->timer.read = nv04_timer_read; | ||
376 | engine->timer.takedown = nv04_timer_takedown; | ||
377 | engine->fb.init = nvc0_fb_init; | ||
378 | engine->fb.takedown = nvc0_fb_takedown; | ||
379 | engine->graph.grclass = NULL; //nvc0_graph_grclass; | ||
380 | engine->graph.init = nvc0_graph_init; | ||
381 | engine->graph.takedown = nvc0_graph_takedown; | ||
382 | engine->graph.fifo_access = nvc0_graph_fifo_access; | ||
383 | engine->graph.channel = nvc0_graph_channel; | ||
384 | engine->graph.create_context = nvc0_graph_create_context; | ||
385 | engine->graph.destroy_context = nvc0_graph_destroy_context; | ||
386 | engine->graph.load_context = nvc0_graph_load_context; | ||
387 | engine->graph.unload_context = nvc0_graph_unload_context; | ||
388 | engine->fifo.channels = 128; | ||
389 | engine->fifo.init = nvc0_fifo_init; | ||
390 | engine->fifo.takedown = nvc0_fifo_takedown; | ||
391 | engine->fifo.disable = nvc0_fifo_disable; | ||
392 | engine->fifo.enable = nvc0_fifo_enable; | ||
393 | engine->fifo.reassign = nvc0_fifo_reassign; | ||
394 | engine->fifo.channel_id = nvc0_fifo_channel_id; | ||
395 | engine->fifo.create_context = nvc0_fifo_create_context; | ||
396 | engine->fifo.destroy_context = nvc0_fifo_destroy_context; | ||
397 | engine->fifo.load_context = nvc0_fifo_load_context; | ||
398 | engine->fifo.unload_context = nvc0_fifo_unload_context; | ||
399 | engine->display.early_init = nv50_display_early_init; | ||
400 | engine->display.late_takedown = nv50_display_late_takedown; | ||
401 | engine->display.create = nv50_display_create; | ||
402 | engine->display.init = nv50_display_init; | ||
403 | engine->display.destroy = nv50_display_destroy; | ||
404 | engine->gpio.init = nv50_gpio_init; | ||
405 | engine->gpio.takedown = nouveau_stub_takedown; | ||
406 | engine->gpio.get = nv50_gpio_get; | ||
407 | engine->gpio.set = nv50_gpio_set; | ||
408 | engine->gpio.irq_enable = nv50_gpio_irq_enable; | ||
409 | break; | ||
362 | default: | 410 | default: |
363 | NV_ERROR(dev, "NV%02x unsupported\n", dev_priv->chipset); | 411 | NV_ERROR(dev, "NV%02x unsupported\n", dev_priv->chipset); |
364 | return 1; | 412 | return 1; |
@@ -815,6 +863,9 @@ int nouveau_load(struct drm_device *dev, unsigned long flags) | |||
815 | case 0xa0: | 863 | case 0xa0: |
816 | dev_priv->card_type = NV_50; | 864 | dev_priv->card_type = NV_50; |
817 | break; | 865 | break; |
866 | case 0xc0: | ||
867 | dev_priv->card_type = NV_C0; | ||
868 | break; | ||
818 | default: | 869 | default: |
819 | NV_INFO(dev, "Unsupported chipset 0x%08x\n", reg0); | 870 | NV_INFO(dev, "Unsupported chipset 0x%08x\n", reg0); |
820 | ret = -EINVAL; | 871 | ret = -EINVAL; |
diff --git a/drivers/gpu/drm/nouveau/nvc0_fb.c b/drivers/gpu/drm/nouveau/nvc0_fb.c new file mode 100644 index 00000000000..26a996025dd --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvc0_fb.c | |||
@@ -0,0 +1,38 @@ | |||
1 | /* | ||
2 | * Copyright 2010 Red Hat Inc. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | ||
20 | * OTHER DEALINGS IN THE SOFTWARE. | ||
21 | * | ||
22 | * Authors: Ben Skeggs | ||
23 | */ | ||
24 | |||
25 | #include "drmP.h" | ||
26 | |||
27 | #include "nouveau_drv.h" | ||
28 | |||
29 | int | ||
30 | nvc0_fb_init(struct drm_device *dev) | ||
31 | { | ||
32 | return 0; | ||
33 | } | ||
34 | |||
35 | void | ||
36 | nvc0_fb_takedown(struct drm_device *dev) | ||
37 | { | ||
38 | } | ||
diff --git a/drivers/gpu/drm/nouveau/nvc0_fifo.c b/drivers/gpu/drm/nouveau/nvc0_fifo.c new file mode 100644 index 00000000000..d6437587197 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvc0_fifo.c | |||
@@ -0,0 +1,96 @@ | |||
1 | /* | ||
2 | * Copyright 2010 Red Hat Inc. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | ||
20 | * OTHER DEALINGS IN THE SOFTWARE. | ||
21 | * | ||
22 | * Authors: Ben Skeggs | ||
23 | */ | ||
24 | |||
25 | #include "drmP.h" | ||
26 | |||
27 | #include "nouveau_drv.h" | ||
28 | |||
29 | void | ||
30 | nvc0_fifo_disable(struct drm_device *dev) | ||
31 | { | ||
32 | } | ||
33 | |||
34 | void | ||
35 | nvc0_fifo_enable(struct drm_device *dev) | ||
36 | { | ||
37 | } | ||
38 | |||
39 | bool | ||
40 | nvc0_fifo_reassign(struct drm_device *dev, bool enable) | ||
41 | { | ||
42 | return false; | ||
43 | } | ||
44 | |||
45 | bool | ||
46 | nvc0_fifo_cache_flush(struct drm_device *dev) | ||
47 | { | ||
48 | return true; | ||
49 | } | ||
50 | |||
51 | bool | ||
52 | nvc0_fifo_cache_pull(struct drm_device *dev, bool enable) | ||
53 | { | ||
54 | return false; | ||
55 | } | ||
56 | |||
57 | int | ||
58 | nvc0_fifo_channel_id(struct drm_device *dev) | ||
59 | { | ||
60 | return 127; | ||
61 | } | ||
62 | |||
63 | int | ||
64 | nvc0_fifo_create_context(struct nouveau_channel *chan) | ||
65 | { | ||
66 | return 0; | ||
67 | } | ||
68 | |||
69 | void | ||
70 | nvc0_fifo_destroy_context(struct nouveau_channel *chan) | ||
71 | { | ||
72 | } | ||
73 | |||
74 | int | ||
75 | nvc0_fifo_load_context(struct nouveau_channel *chan) | ||
76 | { | ||
77 | return 0; | ||
78 | } | ||
79 | |||
80 | int | ||
81 | nvc0_fifo_unload_context(struct drm_device *dev) | ||
82 | { | ||
83 | return 0; | ||
84 | } | ||
85 | |||
86 | void | ||
87 | nvc0_fifo_takedown(struct drm_device *dev) | ||
88 | { | ||
89 | } | ||
90 | |||
91 | int | ||
92 | nvc0_fifo_init(struct drm_device *dev) | ||
93 | { | ||
94 | return 0; | ||
95 | } | ||
96 | |||
diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.c b/drivers/gpu/drm/nouveau/nvc0_graph.c new file mode 100644 index 00000000000..717a5177a8d --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvc0_graph.c | |||
@@ -0,0 +1,75 @@ | |||
1 | /* | ||
2 | * Copyright 2010 Red Hat Inc. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | ||
20 | * OTHER DEALINGS IN THE SOFTWARE. | ||
21 | * | ||
22 | * Authors: Ben Skeggs | ||
23 | */ | ||
24 | |||
25 | #include "drmP.h" | ||
26 | |||
27 | #include "nouveau_drv.h" | ||
28 | |||
29 | void | ||
30 | nvc0_graph_fifo_access(struct drm_device *dev, bool enabled) | ||
31 | { | ||
32 | } | ||
33 | |||
34 | struct nouveau_channel * | ||
35 | nvc0_graph_channel(struct drm_device *dev) | ||
36 | { | ||
37 | return NULL; | ||
38 | } | ||
39 | |||
40 | int | ||
41 | nvc0_graph_create_context(struct nouveau_channel *chan) | ||
42 | { | ||
43 | return 0; | ||
44 | } | ||
45 | |||
46 | void | ||
47 | nvc0_graph_destroy_context(struct nouveau_channel *chan) | ||
48 | { | ||
49 | } | ||
50 | |||
51 | int | ||
52 | nvc0_graph_load_context(struct nouveau_channel *chan) | ||
53 | { | ||
54 | return 0; | ||
55 | } | ||
56 | |||
57 | int | ||
58 | nvc0_graph_unload_context(struct drm_device *dev) | ||
59 | { | ||
60 | return 0; | ||
61 | } | ||
62 | |||
63 | void | ||
64 | nvc0_graph_takedown(struct drm_device *dev) | ||
65 | { | ||
66 | } | ||
67 | |||
68 | int | ||
69 | nvc0_graph_init(struct drm_device *dev) | ||
70 | { | ||
71 | struct drm_nouveau_private *dev_priv = dev->dev_private; | ||
72 | dev_priv->engine.graph.accel_blocked = true; | ||
73 | return 0; | ||
74 | } | ||
75 | |||
diff --git a/drivers/gpu/drm/nouveau/nvc0_instmem.c b/drivers/gpu/drm/nouveau/nvc0_instmem.c new file mode 100644 index 00000000000..c6ffc16dc44 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvc0_instmem.c | |||
@@ -0,0 +1,79 @@ | |||
1 | /* | ||
2 | * Copyright 2010 Red Hat Inc. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | ||
20 | * OTHER DEALINGS IN THE SOFTWARE. | ||
21 | * | ||
22 | * Authors: Ben Skeggs | ||
23 | */ | ||
24 | |||
25 | #include "drmP.h" | ||
26 | |||
27 | #include "nouveau_drv.h" | ||
28 | |||
29 | int | ||
30 | nvc0_instmem_populate(struct drm_device *dev, struct nouveau_gpuobj *gpuobj, | ||
31 | uint32_t *size) | ||
32 | { | ||
33 | return 0; | ||
34 | } | ||
35 | |||
36 | void | ||
37 | nvc0_instmem_clear(struct drm_device *dev, struct nouveau_gpuobj *gpuobj) | ||
38 | { | ||
39 | } | ||
40 | |||
41 | int | ||
42 | nvc0_instmem_bind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj) | ||
43 | { | ||
44 | return 0; | ||
45 | } | ||
46 | |||
47 | int | ||
48 | nvc0_instmem_unbind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj) | ||
49 | { | ||
50 | return 0; | ||
51 | } | ||
52 | |||
53 | void | ||
54 | nvc0_instmem_flush(struct drm_device *dev) | ||
55 | { | ||
56 | } | ||
57 | |||
58 | int | ||
59 | nvc0_instmem_suspend(struct drm_device *dev) | ||
60 | { | ||
61 | return 0; | ||
62 | } | ||
63 | |||
64 | void | ||
65 | nvc0_instmem_resume(struct drm_device *dev) | ||
66 | { | ||
67 | } | ||
68 | |||
69 | int | ||
70 | nvc0_instmem_init(struct drm_device *dev) | ||
71 | { | ||
72 | return 0; | ||
73 | } | ||
74 | |||
75 | void | ||
76 | nvc0_instmem_takedown(struct drm_device *dev) | ||
77 | { | ||
78 | } | ||
79 | |||