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authorAlex Deucher <alexdeucher@gmail.com>2009-08-19 19:11:39 -0400
committerDave Airlie <airlied@redhat.com>2009-08-21 05:10:30 -0400
commitf779b3e513478218cbaaaa0a506d7801cab6fd14 (patch)
tree977258791900e68ed2fbcd78d631c22f4185e48a /drivers/gpu/drm/radeon/radeon_drv.h
parent17782d99502851dc7e48114ee9c5a6d6741cba18 (diff)
drm/radeon: add GET_PARAM/INFO support for Z pipes
Needed for occlusion queries on rv530 chips. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_drv.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index 3933f8216a3..6fa32dac4e9 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -100,9 +100,10 @@
100 * 1.28- Add support for VBL on CRTC2 100 * 1.28- Add support for VBL on CRTC2
101 * 1.29- R500 3D cmd buffer support 101 * 1.29- R500 3D cmd buffer support
102 * 1.30- Add support for occlusion queries 102 * 1.30- Add support for occlusion queries
103 * 1.31- Add support for num Z pipes from GET_PARAM
103 */ 104 */
104#define DRIVER_MAJOR 1 105#define DRIVER_MAJOR 1
105#define DRIVER_MINOR 30 106#define DRIVER_MINOR 31
106#define DRIVER_PATCHLEVEL 0 107#define DRIVER_PATCHLEVEL 0
107 108
108/* 109/*
@@ -329,6 +330,7 @@ typedef struct drm_radeon_private {
329 resource_size_t fb_aper_offset; 330 resource_size_t fb_aper_offset;
330 331
331 int num_gb_pipes; 332 int num_gb_pipes;
333 int num_z_pipes;
332 int track_flush; 334 int track_flush;
333 drm_local_map_t *mmio; 335 drm_local_map_t *mmio;
334 336
@@ -689,6 +691,7 @@ extern void r600_page_table_cleanup(struct drm_device *dev, struct drm_ati_pciga
689 691
690/* pipe config regs */ 692/* pipe config regs */
691#define R400_GB_PIPE_SELECT 0x402c 693#define R400_GB_PIPE_SELECT 0x402c
694#define RV530_GB_PIPE_SELECT2 0x4124
692#define R500_DYN_SCLK_PWMEM_PIPE 0x000d /* PLL */ 695#define R500_DYN_SCLK_PWMEM_PIPE 0x000d /* PLL */
693#define R300_GB_TILE_CONFIG 0x4018 696#define R300_GB_TILE_CONFIG 0x4018
694# define R300_ENABLE_TILING (1 << 0) 697# define R300_ENABLE_TILING (1 << 0)