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authorAlex Deucher <alexdeucher@gmail.com>2010-05-20 12:43:52 -0400
committerDave Airlie <airlied@redhat.com>2010-08-01 20:00:03 -0400
commit7f813377203a60be01a3354664edc5d3c746100d (patch)
tree22261aa7bc82a6b2e6f183cbda66ff79e7277fe6 /drivers/gpu/drm/radeon/r600d.h
parent97d663285322b3db05613d274b1eb3f9806f37ca (diff)
drm/radeon/kms: add tiling support to the cs checker for r6xx/r7xx
Check for relocs for DB_DEPTH_INFO, CB_COLOR*_INFO, and texture resources. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r600d.h')
-rw-r--r--drivers/gpu/drm/radeon/r600d.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
index 23205f03287..b7318ac4f84 100644
--- a/drivers/gpu/drm/radeon/r600d.h
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -1159,6 +1159,10 @@
1159#define S_038000_TILE_MODE(x) (((x) & 0xF) << 3) 1159#define S_038000_TILE_MODE(x) (((x) & 0xF) << 3)
1160#define G_038000_TILE_MODE(x) (((x) >> 3) & 0xF) 1160#define G_038000_TILE_MODE(x) (((x) >> 3) & 0xF)
1161#define C_038000_TILE_MODE 0xFFFFFF87 1161#define C_038000_TILE_MODE 0xFFFFFF87
1162#define V_038000_ARRAY_LINEAR_GENERAL 0x00000000
1163#define V_038000_ARRAY_LINEAR_ALIGNED 0x00000001
1164#define V_038000_ARRAY_1D_TILED_THIN1 0x00000002
1165#define V_038000_ARRAY_2D_TILED_THIN1 0x00000004
1162#define S_038000_TILE_TYPE(x) (((x) & 0x1) << 7) 1166#define S_038000_TILE_TYPE(x) (((x) & 0x1) << 7)
1163#define G_038000_TILE_TYPE(x) (((x) >> 7) & 0x1) 1167#define G_038000_TILE_TYPE(x) (((x) >> 7) & 0x1)
1164#define C_038000_TILE_TYPE 0xFFFFFF7F 1168#define C_038000_TILE_TYPE 0xFFFFFF7F
@@ -1362,6 +1366,8 @@
1362#define S_028010_ARRAY_MODE(x) (((x) & 0xF) << 15) 1366#define S_028010_ARRAY_MODE(x) (((x) & 0xF) << 15)
1363#define G_028010_ARRAY_MODE(x) (((x) >> 15) & 0xF) 1367#define G_028010_ARRAY_MODE(x) (((x) >> 15) & 0xF)
1364#define C_028010_ARRAY_MODE 0xFFF87FFF 1368#define C_028010_ARRAY_MODE 0xFFF87FFF
1369#define V_028010_ARRAY_1D_TILED_THIN1 0x00000002
1370#define V_028010_ARRAY_2D_TILED_THIN1 0x00000004
1365#define S_028010_TILE_SURFACE_ENABLE(x) (((x) & 0x1) << 25) 1371#define S_028010_TILE_SURFACE_ENABLE(x) (((x) & 0x1) << 25)
1366#define G_028010_TILE_SURFACE_ENABLE(x) (((x) >> 25) & 0x1) 1372#define G_028010_TILE_SURFACE_ENABLE(x) (((x) >> 25) & 0x1)
1367#define C_028010_TILE_SURFACE_ENABLE 0xFDFFFFFF 1373#define C_028010_TILE_SURFACE_ENABLE 0xFDFFFFFF