diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2010-09-01 01:24:31 -0400 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2010-09-24 02:20:14 -0400 |
commit | a8eaebc6c52bb0cd243b4cb421068f42d378be9c (patch) | |
tree | 12f796e5210d51f78b9fc6ddd4750cf1421373c2 /drivers/gpu/drm/nouveau/nv40_graph.c | |
parent | de3a6c0a3b642c0c350414d63298a1b19a009290 (diff) |
drm/nouveau: remove nouveau_gpuobj_ref completely, replace with sanity
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv40_graph.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nv40_graph.c | 16 |
1 files changed, 7 insertions, 9 deletions
diff --git a/drivers/gpu/drm/nouveau/nv40_graph.c b/drivers/gpu/drm/nouveau/nv40_graph.c index 6215dfcf1ea..912940e2457 100644 --- a/drivers/gpu/drm/nouveau/nv40_graph.c +++ b/drivers/gpu/drm/nouveau/nv40_graph.c | |||
@@ -45,7 +45,7 @@ nv40_graph_channel(struct drm_device *dev) | |||
45 | struct nouveau_channel *chan = dev_priv->fifos[i]; | 45 | struct nouveau_channel *chan = dev_priv->fifos[i]; |
46 | 46 | ||
47 | if (chan && chan->ramin_grctx && | 47 | if (chan && chan->ramin_grctx && |
48 | chan->ramin_grctx->instance == inst) | 48 | chan->ramin_grctx->pinst == inst) |
49 | return chan; | 49 | return chan; |
50 | } | 50 | } |
51 | 51 | ||
@@ -61,27 +61,25 @@ nv40_graph_create_context(struct nouveau_channel *chan) | |||
61 | struct nouveau_grctx ctx = {}; | 61 | struct nouveau_grctx ctx = {}; |
62 | int ret; | 62 | int ret; |
63 | 63 | ||
64 | ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, pgraph->grctx_size, | 64 | ret = nouveau_gpuobj_new(dev, chan, pgraph->grctx_size, 16, |
65 | 16, NVOBJ_FLAG_ZERO_ALLOC, | 65 | NVOBJ_FLAG_ZERO_ALLOC, &chan->ramin_grctx); |
66 | &chan->ramin_grctx); | ||
67 | if (ret) | 66 | if (ret) |
68 | return ret; | 67 | return ret; |
69 | 68 | ||
70 | /* Initialise default context values */ | 69 | /* Initialise default context values */ |
71 | ctx.dev = chan->dev; | 70 | ctx.dev = chan->dev; |
72 | ctx.mode = NOUVEAU_GRCTX_VALS; | 71 | ctx.mode = NOUVEAU_GRCTX_VALS; |
73 | ctx.data = chan->ramin_grctx->gpuobj; | 72 | ctx.data = chan->ramin_grctx; |
74 | nv40_grctx_init(&ctx); | 73 | nv40_grctx_init(&ctx); |
75 | 74 | ||
76 | nv_wo32(chan->ramin_grctx->gpuobj, 0, | 75 | nv_wo32(chan->ramin_grctx, 0, chan->ramin_grctx->im_pramin->start); |
77 | chan->ramin_grctx->gpuobj->im_pramin->start); | ||
78 | return 0; | 76 | return 0; |
79 | } | 77 | } |
80 | 78 | ||
81 | void | 79 | void |
82 | nv40_graph_destroy_context(struct nouveau_channel *chan) | 80 | nv40_graph_destroy_context(struct nouveau_channel *chan) |
83 | { | 81 | { |
84 | nouveau_gpuobj_ref_del(chan->dev, &chan->ramin_grctx); | 82 | nouveau_gpuobj_ref(NULL, &chan->ramin_grctx); |
85 | } | 83 | } |
86 | 84 | ||
87 | static int | 85 | static int |
@@ -135,7 +133,7 @@ nv40_graph_load_context(struct nouveau_channel *chan) | |||
135 | 133 | ||
136 | if (!chan->ramin_grctx) | 134 | if (!chan->ramin_grctx) |
137 | return -EINVAL; | 135 | return -EINVAL; |
138 | inst = chan->ramin_grctx->instance >> 4; | 136 | inst = chan->ramin_grctx->pinst >> 4; |
139 | 137 | ||
140 | ret = nv40_graph_transfer_context(dev, inst, 0); | 138 | ret = nv40_graph_transfer_context(dev, inst, 0); |
141 | if (ret) | 139 | if (ret) |