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authorDaniel Vetter <daniel.vetter@ffwll.ch>2012-05-12 16:22:58 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-06-09 11:32:59 -0400
commitda94f65433119e4961748c8dc6f7603a3c53232b (patch)
tree73fa3044b7ebd8a4f3768b754f72aaba66675947 /drivers/gpu/drm/i915/intel_sdvo.c
parent0fe9c3d32bc0e7a46d78dca13a6ed3f91ec92f47 (diff)
drm/i915: properly handle interlaced bit for sdvo dtd conversion
commit 59d92bfa5f0cdf57f82f5181b0ad6af75c3fdf41 upstream. We've simply ignored this, which isn't too great. With this, interlaced 1080i works on my HDMI screen connected through sdvo. For no apparent reason anything else still doesn't work as it should. While at it, give these magic numbers in the dtd proper names and add a comment that they match with EDID detailed timings. v2: Actually use the right bit for interlaced. Tested-by: Peter Ross <pross@xvid.org> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sdvo.c')
-rw-r--r--drivers/gpu/drm/i915/intel_sdvo.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index 06bc46ee22f..c9010607474 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -762,10 +762,12 @@ static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
762 ((v_sync_len & 0x30) >> 4); 762 ((v_sync_len & 0x30) >> 4);
763 763
764 dtd->part2.dtd_flags = 0x18; 764 dtd->part2.dtd_flags = 0x18;
765 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
766 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
765 if (mode->flags & DRM_MODE_FLAG_PHSYNC) 767 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
766 dtd->part2.dtd_flags |= 0x2; 768 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
767 if (mode->flags & DRM_MODE_FLAG_PVSYNC) 769 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
768 dtd->part2.dtd_flags |= 0x4; 770 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
769 771
770 dtd->part2.sdvo_flags = 0; 772 dtd->part2.sdvo_flags = 0;
771 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; 773 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
@@ -799,9 +801,11 @@ static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
799 mode->clock = dtd->part1.clock * 10; 801 mode->clock = dtd->part1.clock * 10;
800 802
801 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); 803 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
802 if (dtd->part2.dtd_flags & 0x2) 804 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
805 mode->flags |= DRM_MODE_FLAG_INTERLACE;
806 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
803 mode->flags |= DRM_MODE_FLAG_PHSYNC; 807 mode->flags |= DRM_MODE_FLAG_PHSYNC;
804 if (dtd->part2.dtd_flags & 0x4) 808 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
805 mode->flags |= DRM_MODE_FLAG_PVSYNC; 809 mode->flags |= DRM_MODE_FLAG_PVSYNC;
806} 810}
807 811