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authorChris Wilson <chris@chris-wilson.co.uk>2010-09-15 07:03:59 -0400
committerChris Wilson <chris@chris-wilson.co.uk>2010-09-15 11:45:25 -0400
commit373a3cf744c774478f44921c50011b896ab08f9d (patch)
tree78725e96b9d17190c05baa50a96bf1afdcab0e7f /drivers/gpu/drm/i915/intel_sdvo.c
parent2f551c84563df2bf144a819993b2d729c66583ee (diff)
drm/i915: call drm_encoder_init first
Later initialisation of the encoder often requires that drm_encoder_init() has already been called, for instance, initialiasing the DDC buses. Yet another recent regression, as 819f3fb7 depended upon these fixes which I missed when cherry-picking. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sdvo.c')
-rw-r--r--drivers/gpu/drm/i915/intel_sdvo.c15
1 files changed, 7 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index d2b4a6a2840..f7030e48108 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -2552,6 +2552,8 @@ bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2552 2552
2553 intel_encoder = &intel_sdvo->base; 2553 intel_encoder = &intel_sdvo->base;
2554 intel_encoder->type = INTEL_OUTPUT_SDVO; 2554 intel_encoder->type = INTEL_OUTPUT_SDVO;
2555 /* encoder type will be decided later */
2556 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2555 2557
2556 if (HAS_PCH_SPLIT(dev)) { 2558 if (HAS_PCH_SPLIT(dev)) {
2557 i2c_reg = PCH_GPIOE; 2559 i2c_reg = PCH_GPIOE;
@@ -2606,31 +2608,29 @@ bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2606 /* Wrap with our custom algo which switches to DDC mode */ 2608 /* Wrap with our custom algo which switches to DDC mode */
2607 intel_encoder->ddc_bus->algo = &intel_sdvo_i2c_bit_algo; 2609 intel_encoder->ddc_bus->algo = &intel_sdvo_i2c_bit_algo;
2608 2610
2609 /* encoder type will be decided later */
2610 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2611 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs); 2611 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2612 2612
2613 /* In default case sdvo lvds is false */ 2613 /* In default case sdvo lvds is false */
2614 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps)) 2614 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2615 goto err_enc; 2615 goto err_i2c;
2616 2616
2617 if (intel_sdvo_output_setup(intel_sdvo, 2617 if (intel_sdvo_output_setup(intel_sdvo,
2618 intel_sdvo->caps.output_flags) != true) { 2618 intel_sdvo->caps.output_flags) != true) {
2619 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n", 2619 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2620 IS_SDVOB(sdvo_reg) ? 'B' : 'C'); 2620 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2621 goto err_enc; 2621 goto err_i2c;
2622 } 2622 }
2623 2623
2624 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg); 2624 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2625 2625
2626 /* Set the input timing to the screen. Assume always input 0. */ 2626 /* Set the input timing to the screen. Assume always input 0. */
2627 if (!intel_sdvo_set_target_input(intel_sdvo)) 2627 if (!intel_sdvo_set_target_input(intel_sdvo))
2628 goto err_enc; 2628 goto err_i2c;
2629 2629
2630 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo, 2630 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2631 &intel_sdvo->pixel_clock_min, 2631 &intel_sdvo->pixel_clock_min,
2632 &intel_sdvo->pixel_clock_max)) 2632 &intel_sdvo->pixel_clock_max))
2633 goto err_enc; 2633 goto err_i2c;
2634 2634
2635 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " 2635 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2636 "clock range %dMHz - %dMHz, " 2636 "clock range %dMHz - %dMHz, "
@@ -2650,14 +2650,13 @@ bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2650 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); 2650 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2651 return true; 2651 return true;
2652 2652
2653err_enc:
2654 drm_encoder_cleanup(&intel_encoder->base);
2655err_i2c: 2653err_i2c:
2656 if (intel_encoder->ddc_bus != NULL) 2654 if (intel_encoder->ddc_bus != NULL)
2657 intel_i2c_destroy(intel_encoder->ddc_bus); 2655 intel_i2c_destroy(intel_encoder->ddc_bus);
2658 if (intel_encoder->i2c_bus != NULL) 2656 if (intel_encoder->i2c_bus != NULL)
2659 intel_i2c_destroy(intel_encoder->i2c_bus); 2657 intel_i2c_destroy(intel_encoder->i2c_bus);
2660err_inteloutput: 2658err_inteloutput:
2659 drm_encoder_cleanup(&intel_encoder->base);
2661 kfree(intel_sdvo); 2660 kfree(intel_sdvo);
2662 2661
2663 return false; 2662 return false;