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authorDaniel Vetter <daniel.vetter@ffwll.ch>2010-11-04 12:11:09 -0400
committerChris Wilson <chris@chris-wilson.co.uk>2010-11-04 15:02:03 -0400
commit75e9e9158f38e5cb21eff23b30bafa6f32e0a606 (patch)
treec52330f275112d47762a0ef0bde1efb5a82e748f /drivers/gpu/drm/i915/intel_ringbuffer.c
parent818f2a3cc34b0673dccd4188ce4a1862d9d90127 (diff)
drm/i915: kill mappable/fenceable disdinction
a00b10c360b35d6431a "Only enforce fence limits inside the GTT" also added a fenceable/mappable disdinction when binding/pinning buffers. This only complicates the code with no pratical gain: - In execbuffer this matters on for g33/pineview, as this is the only chip that needs fences and has an unmappable gtt area. But fences are only possible in the mappable part of the gtt, so need_fence implies need_mappable. And need_mappable is only set independantly with relocations which implies (for sane userspace) that the buffer is untiled. - The overlay code is only really used on i8xx, which doesn't have unmappable gtt. And it doesn't support tiled buffers, currently. - For all other buffers it's a bug to pass in a tiled bo. In short, this disdinction doesn't have any practical gain. I've also reverted mapping the overlay and context pages as possibly unmappable. It's not worth being overtly clever here, all the big gains from unmappable are for execbuf bos. Also add a comment for a clever optimization that confused me while reading the original patch by Chris Wilson. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 85071570e1f..78a5061a58f 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -547,7 +547,7 @@ static int init_status_page(struct intel_ring_buffer *ring)
547 obj_priv = to_intel_bo(obj); 547 obj_priv = to_intel_bo(obj);
548 obj_priv->agp_type = AGP_USER_CACHED_MEMORY; 548 obj_priv->agp_type = AGP_USER_CACHED_MEMORY;
549 549
550 ret = i915_gem_object_pin(obj, 4096, true, false); 550 ret = i915_gem_object_pin(obj, 4096, true);
551 if (ret != 0) { 551 if (ret != 0) {
552 goto err_unref; 552 goto err_unref;
553 } 553 }
@@ -602,7 +602,7 @@ int intel_init_ring_buffer(struct drm_device *dev,
602 602
603 ring->gem_object = obj; 603 ring->gem_object = obj;
604 604
605 ret = i915_gem_object_pin(obj, PAGE_SIZE, true, false); 605 ret = i915_gem_object_pin(obj, PAGE_SIZE, true);
606 if (ret) 606 if (ret)
607 goto err_unref; 607 goto err_unref;
608 608
@@ -906,7 +906,7 @@ static int blt_ring_init(struct intel_ring_buffer *ring)
906 if (obj == NULL) 906 if (obj == NULL)
907 return -ENOMEM; 907 return -ENOMEM;
908 908
909 ret = i915_gem_object_pin(&obj->base, 4096, true, false); 909 ret = i915_gem_object_pin(&obj->base, 4096, true);
910 if (ret) { 910 if (ret) {
911 drm_gem_object_unreference(&obj->base); 911 drm_gem_object_unreference(&obj->base);
912 return ret; 912 return ret;