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authorYang Shi <yang.shi@windriver.com>2009-06-30 14:41:22 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-06-30 21:55:59 -0400
commitb1cfebc9231a69d46d66982a2c856ba41ef6d6b9 (patch)
tree1f9024e57cc6169052c255bbba270fab626e6ca3 /drivers/edac/mpc85xx_edac.c
parentc4285b47b0514e2103584ee829246f813e7ae323 (diff)
edac: add DDR3 memory type for MPC85xx EDAC
Since some new MPC85xx SOCs support DDR3 memory now, so add DDR3 memory type for MPC85xx EDAC. Signed-off-by: Yang Shi <yang.shi@windriver.com> Cc: Doug Thompson <norsk5@yahoo.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/edac/mpc85xx_edac.c')
-rw-r--r--drivers/edac/mpc85xx_edac.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index 7c8c2d72916..3f2ccfc6407 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -757,6 +757,9 @@ static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci)
757 case DSC_SDTYPE_DDR2: 757 case DSC_SDTYPE_DDR2:
758 mtype = MEM_RDDR2; 758 mtype = MEM_RDDR2;
759 break; 759 break;
760 case DSC_SDTYPE_DDR3:
761 mtype = MEM_RDDR3;
762 break;
760 default: 763 default:
761 mtype = MEM_UNKNOWN; 764 mtype = MEM_UNKNOWN;
762 break; 765 break;
@@ -769,6 +772,9 @@ static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci)
769 case DSC_SDTYPE_DDR2: 772 case DSC_SDTYPE_DDR2:
770 mtype = MEM_DDR2; 773 mtype = MEM_DDR2;
771 break; 774 break;
775 case DSC_SDTYPE_DDR3:
776 mtype = MEM_DDR3;
777 break;
772 default: 778 default:
773 mtype = MEM_UNKNOWN; 779 mtype = MEM_UNKNOWN;
774 break; 780 break;