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authorSteve French <sfrench@us.ibm.com>2005-12-31 13:27:22 -0500
committerSteve French <sfrench@us.ibm.com>2005-12-31 13:27:22 -0500
commiteea60caef610c7a6c58c0de9c80ae1e438e01301 (patch)
tree25e19289bba003fe085e589430d0d981fd6b73a7 /drivers/char/drm
parentda8543ef125afc7bba4da526b61a1ae07dc25109 (diff)
parent82c9df820112c6286a8e8fbe482e94b65b49062c (diff)
Merge with /pub/scm/linux/kernel/git/torvalds/linux-2.6.git
Signed-off-by: Steve French <sfrench@us.ibm.com>
Diffstat (limited to 'drivers/char/drm')
-rw-r--r--drivers/char/drm/radeon_cp.c4
-rw-r--r--drivers/char/drm/radeon_drv.h1
2 files changed, 3 insertions, 2 deletions
diff --git a/drivers/char/drm/radeon_cp.c b/drivers/char/drm/radeon_cp.c
index 9f2b4efd0c7..342302d4674 100644
--- a/drivers/char/drm/radeon_cp.c
+++ b/drivers/char/drm/radeon_cp.c
@@ -1311,7 +1311,7 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
1311 1311
1312static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init) 1312static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
1313{ 1313{
1314 drm_radeon_private_t *dev_priv = dev->dev_private;; 1314 drm_radeon_private_t *dev_priv = dev->dev_private;
1315 DRM_DEBUG("\n"); 1315 DRM_DEBUG("\n");
1316 1316
1317 dev_priv->is_pci = init->is_pci; 1317 dev_priv->is_pci = init->is_pci;
@@ -1522,7 +1522,7 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
1522 1522
1523 dev_priv->gart_size = init->gart_size; 1523 dev_priv->gart_size = init->gart_size;
1524 dev_priv->gart_vm_start = dev_priv->fb_location 1524 dev_priv->gart_vm_start = dev_priv->fb_location
1525 + RADEON_READ(RADEON_CONFIG_APER_SIZE) * 2; 1525 + RADEON_READ(RADEON_CONFIG_APER_SIZE);
1526 1526
1527#if __OS_HAS_AGP 1527#if __OS_HAS_AGP
1528 if (!dev_priv->is_pci) 1528 if (!dev_priv->is_pci)
diff --git a/drivers/char/drm/radeon_drv.h b/drivers/char/drm/radeon_drv.h
index 7bda7e33d2b..d92ccee3e54 100644
--- a/drivers/char/drm/radeon_drv.h
+++ b/drivers/char/drm/radeon_drv.h
@@ -379,6 +379,7 @@ extern int r300_do_cp_cmdbuf(drm_device_t * dev, DRMFILE filp,
379# define RADEON_PLL_WR_EN (1 << 7) 379# define RADEON_PLL_WR_EN (1 << 7)
380#define RADEON_CLOCK_CNTL_INDEX 0x0008 380#define RADEON_CLOCK_CNTL_INDEX 0x0008
381#define RADEON_CONFIG_APER_SIZE 0x0108 381#define RADEON_CONFIG_APER_SIZE 0x0108
382#define RADEON_CONFIG_MEMSIZE 0x00f8
382#define RADEON_CRTC_OFFSET 0x0224 383#define RADEON_CRTC_OFFSET 0x0224
383#define RADEON_CRTC_OFFSET_CNTL 0x0228 384#define RADEON_CRTC_OFFSET_CNTL 0x0228
384# define RADEON_CRTC_TILE_EN (1 << 15) 385# define RADEON_CRTC_TILE_EN (1 << 15)