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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2009-02-21 16:42:50 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-02-21 16:42:50 -0500
commit22b61a11fd4e6d7a48d694ce350331bebc0394ed (patch)
treef4be46c8154f5094c248fcd9fdf644b236f591b3 /drivers/ata
parent423145a5d4def58cff760809d48cfb21316d59a9 (diff)
parentfa4e998999322bc1b11d2c8b19b9fa2016fd1548 (diff)
Merge branch 'dma' into devel
Conflicts: arch/arm/plat-mxc/dma-mx1-mx2.c
Diffstat (limited to 'drivers/ata')
-rw-r--r--drivers/ata/pata_icside.c19
1 files changed, 3 insertions, 16 deletions
diff --git a/drivers/ata/pata_icside.c b/drivers/ata/pata_icside.c
index cf9e9848f8b..d7bc925c524 100644
--- a/drivers/ata/pata_icside.c
+++ b/drivers/ata/pata_icside.c
@@ -45,8 +45,6 @@ static const struct portinfo pata_icside_portinfo_v6_2 = {
45 .stepping = 6, 45 .stepping = 6,
46}; 46};
47 47
48#define PATA_ICSIDE_MAX_SG 128
49
50struct pata_icside_state { 48struct pata_icside_state {
51 void __iomem *irq_port; 49 void __iomem *irq_port;
52 void __iomem *ioc_base; 50 void __iomem *ioc_base;
@@ -57,7 +55,6 @@ struct pata_icside_state {
57 u8 disabled; 55 u8 disabled;
58 unsigned int speed[ATA_MAX_DEVICES]; 56 unsigned int speed[ATA_MAX_DEVICES];
59 } port[2]; 57 } port[2];
60 struct scatterlist sg[PATA_ICSIDE_MAX_SG];
61}; 58};
62 59
63struct pata_icside_info { 60struct pata_icside_info {
@@ -222,9 +219,7 @@ static void pata_icside_bmdma_setup(struct ata_queued_cmd *qc)
222{ 219{
223 struct ata_port *ap = qc->ap; 220 struct ata_port *ap = qc->ap;
224 struct pata_icside_state *state = ap->host->private_data; 221 struct pata_icside_state *state = ap->host->private_data;
225 struct scatterlist *sg, *rsg = state->sg;
226 unsigned int write = qc->tf.flags & ATA_TFLAG_WRITE; 222 unsigned int write = qc->tf.flags & ATA_TFLAG_WRITE;
227 unsigned int si;
228 223
229 /* 224 /*
230 * We are simplex; BUG if we try to fiddle with DMA 225 * We are simplex; BUG if we try to fiddle with DMA
@@ -233,20 +228,12 @@ static void pata_icside_bmdma_setup(struct ata_queued_cmd *qc)
233 BUG_ON(dma_channel_active(state->dma)); 228 BUG_ON(dma_channel_active(state->dma));
234 229
235 /* 230 /*
236 * Copy ATAs scattered sg list into a contiguous array of sg
237 */
238 for_each_sg(qc->sg, sg, qc->n_elem, si) {
239 memcpy(rsg, sg, sizeof(*sg));
240 rsg++;
241 }
242
243 /*
244 * Route the DMA signals to the correct interface 231 * Route the DMA signals to the correct interface
245 */ 232 */
246 writeb(state->port[ap->port_no].port_sel, state->ioc_base); 233 writeb(state->port[ap->port_no].port_sel, state->ioc_base);
247 234
248 set_dma_speed(state->dma, state->port[ap->port_no].speed[qc->dev->devno]); 235 set_dma_speed(state->dma, state->port[ap->port_no].speed[qc->dev->devno]);
249 set_dma_sg(state->dma, state->sg, rsg - state->sg); 236 set_dma_sg(state->dma, qc->sg, qc->n_elem);
250 set_dma_mode(state->dma, write ? DMA_MODE_WRITE : DMA_MODE_READ); 237 set_dma_mode(state->dma, write ? DMA_MODE_WRITE : DMA_MODE_READ);
251 238
252 /* issue r/w command */ 239 /* issue r/w command */
@@ -306,8 +293,8 @@ static int icside_dma_init(struct pata_icside_info *info)
306 293
307static struct scsi_host_template pata_icside_sht = { 294static struct scsi_host_template pata_icside_sht = {
308 ATA_BASE_SHT(DRV_NAME), 295 ATA_BASE_SHT(DRV_NAME),
309 .sg_tablesize = PATA_ICSIDE_MAX_SG, 296 .sg_tablesize = SCSI_MAX_SG_CHAIN_SEGMENTS,
310 .dma_boundary = ~0, /* no dma boundaries */ 297 .dma_boundary = IOMD_DMA_BOUNDARY,
311}; 298};
312 299
313static void pata_icside_postreset(struct ata_link *link, unsigned int *classes) 300static void pata_icside_postreset(struct ata_link *link, unsigned int *classes)