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authorPhil Sutter <n0-1@freewrt.org>2008-11-11 18:16:04 -0500
committerRalf Baechle <ralf@linux-mips.org>2009-01-30 16:32:59 -0500
commitfb91e2cb7d3d44356bb92411d6d6b7cb51ce156c (patch)
treee581e00aa607d8ef799c38336ad5932d081808b3 /arch
parent5379a5fdf3cb2b23d00da2a1298167f9a1fb002a (diff)
MIPS: RC32434: Define io_map_base for PCI controller
The code is rather based on trial-and-error than knowledge. Verified Via Rhine functionality in PIO as well as MMIO mode. [Looks sane -- Ralf] Signed-off-by: Phil Sutter <n0-1@freewrt.org> Tested-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/pci/pci-rc32434.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/mips/pci/pci-rc32434.c b/arch/mips/pci/pci-rc32434.c
index 1c2821e2f49..71f7d27b0d4 100644
--- a/arch/mips/pci/pci-rc32434.c
+++ b/arch/mips/pci/pci-rc32434.c
@@ -205,6 +205,8 @@ static int __init rc32434_pcibridge_init(void)
205 205
206static int __init rc32434_pci_init(void) 206static int __init rc32434_pci_init(void)
207{ 207{
208 void __iomem *io_map_base;
209
208 pr_info("PCI: Initializing PCI\n"); 210 pr_info("PCI: Initializing PCI\n");
209 211
210 ioport_resource.start = rc32434_res_pci_io1.start; 212 ioport_resource.start = rc32434_res_pci_io1.start;
@@ -212,6 +214,15 @@ static int __init rc32434_pci_init(void)
212 214
213 rc32434_pcibridge_init(); 215 rc32434_pcibridge_init();
214 216
217 io_map_base = ioremap(rc32434_res_pci_io1.start,
218 rc32434_res_pci_io1.end - rc32434_res_pci_io1.start + 1);
219
220 if (!io_map_base)
221 return -ENOMEM;
222
223 rc32434_controller.io_map_base =
224 (unsigned long)io_map_base - rc32434_res_pci_io1.start;
225
215 register_pci_controller(&rc32434_controller); 226 register_pci_controller(&rc32434_controller);
216 rc32434_sync(); 227 rc32434_sync();
217 228