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authorKrzysztof Hałasa <khc@pm.waw.pl>2009-03-17 08:51:52 -0400
committerKrzysztof Hałasa <khc@pm.waw.pl>2009-03-17 10:01:45 -0400
commitde3ce856d67b770f7d546e3f3e6a3972deb319a8 (patch)
tree14767aa43d54a80b3a6b90e6188e2b5bd04d651d /arch
parent5ca328d24d25fa2c8d2aa33cb85116695be11070 (diff)
IXP4xx: cpu_is_ixp4*() now recognizes all IXP4xx processors.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/cpu.h35
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h42
2 files changed, 52 insertions, 25 deletions
diff --git a/arch/arm/mach-ixp4xx/include/mach/cpu.h b/arch/arm/mach-ixp4xx/include/mach/cpu.h
index 51bd69c46d9..def7773be67 100644
--- a/arch/arm/mach-ixp4xx/include/mach/cpu.h
+++ b/arch/arm/mach-ixp4xx/include/mach/cpu.h
@@ -17,26 +17,31 @@
17#include <asm/cputype.h> 17#include <asm/cputype.h>
18 18
19/* Processor id value in CP15 Register 0 */ 19/* Processor id value in CP15 Register 0 */
20#define IXP425_PROCESSOR_ID_VALUE 0x690541c0 20#define IXP42X_PROCESSOR_ID_VALUE 0x690541c0 /* including unused 0x690541Ex */
21#define IXP435_PROCESSOR_ID_VALUE 0x69054040 21#define IXP42X_PROCESSOR_ID_MASK 0xffffffc0
22#define IXP465_PROCESSOR_ID_VALUE 0x69054200 22
23#define IXP4XX_PROCESSOR_ID_MASK 0xfffffff0 23#define IXP43X_PROCESSOR_ID_VALUE 0x69054040
24 24#define IXP43X_PROCESSOR_ID_MASK 0xfffffff0
25#define cpu_is_ixp42x() ((read_cpuid_id() & IXP4XX_PROCESSOR_ID_MASK) == \ 25
26 IXP425_PROCESSOR_ID_VALUE) 26#define IXP46X_PROCESSOR_ID_VALUE 0x69054200 /* including IXP455 */
27#define cpu_is_ixp43x() ((read_cpuid_id() & IXP4XX_PROCESSOR_ID_MASK) == \ 27#define IXP46X_PROCESSOR_ID_MASK 0xfffffff0
28 IXP435_PROCESSOR_ID_VALUE) 28
29#define cpu_is_ixp46x() ((read_cpuid_id() & IXP4XX_PROCESSOR_ID_MASK) == \ 29#define cpu_is_ixp42x() ((read_cpuid_id() & IXP42X_PROCESSOR_ID_MASK) == \
30 IXP465_PROCESSOR_ID_VALUE) 30 IXP42X_PROCESSOR_ID_VALUE)
31#define cpu_is_ixp43x() ((read_cpuid_id() & IXP43X_PROCESSOR_ID_MASK) == \
32 IXP43X_PROCESSOR_ID_VALUE)
33#define cpu_is_ixp46x() ((read_cpuid_id() & IXP46X_PROCESSOR_ID_MASK) == \
34 IXP46X_PROCESSOR_ID_VALUE)
31 35
32static inline u32 ixp4xx_read_feature_bits(void) 36static inline u32 ixp4xx_read_feature_bits(void)
33{ 37{
34 unsigned int val = ~*IXP4XX_EXP_CFG2; 38 unsigned int val = ~*IXP4XX_EXP_CFG2;
35 val &= ~IXP4XX_FEATURE_RESERVED;
36 if (!cpu_is_ixp46x())
37 val &= ~IXP4XX_FEATURE_IXP46X_ONLY;
38 39
39 return val; 40 if (cpu_is_ixp42x())
41 return val & IXP42X_FEATURE_MASK;
42 if (cpu_is_ixp43x())
43 return val & IXP43X_FEATURE_MASK;
44 return val & IXP46X_FEATURE_MASK;
40} 45}
41 46
42static inline void ixp4xx_write_feature_bits(u32 value) 47static inline void ixp4xx_write_feature_bits(u32 value)
diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
index ad9c888dd85..97c530f66e7 100644
--- a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
+++ b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
@@ -604,6 +604,7 @@
604#define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */ 604#define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */
605 605
606/* "fuse" bits of IXP_EXP_CFG2 */ 606/* "fuse" bits of IXP_EXP_CFG2 */
607/* All IXP4xx CPUs */
607#define IXP4XX_FEATURE_RCOMP (1 << 0) 608#define IXP4XX_FEATURE_RCOMP (1 << 0)
608#define IXP4XX_FEATURE_USB_DEVICE (1 << 1) 609#define IXP4XX_FEATURE_USB_DEVICE (1 << 1)
609#define IXP4XX_FEATURE_HASH (1 << 2) 610#define IXP4XX_FEATURE_HASH (1 << 2)
@@ -619,20 +620,41 @@
619#define IXP4XX_FEATURE_RESET_NPEB (1 << 12) 620#define IXP4XX_FEATURE_RESET_NPEB (1 << 12)
620#define IXP4XX_FEATURE_RESET_NPEC (1 << 13) 621#define IXP4XX_FEATURE_RESET_NPEC (1 << 13)
621#define IXP4XX_FEATURE_PCI (1 << 14) 622#define IXP4XX_FEATURE_PCI (1 << 14)
622#define IXP4XX_FEATURE_ECC_TIMESYNC (1 << 15)
623#define IXP4XX_FEATURE_UTOPIA_PHY_LIMIT (3 << 16) 623#define IXP4XX_FEATURE_UTOPIA_PHY_LIMIT (3 << 16)
624#define IXP4XX_FEATURE_XSCALE_MAX_FREQ (3 << 22)
625#define IXP42X_FEATURE_MASK (IXP4XX_FEATURE_RCOMP | \
626 IXP4XX_FEATURE_USB_DEVICE | \
627 IXP4XX_FEATURE_HASH | \
628 IXP4XX_FEATURE_AES | \
629 IXP4XX_FEATURE_DES | \
630 IXP4XX_FEATURE_HDLC | \
631 IXP4XX_FEATURE_AAL | \
632 IXP4XX_FEATURE_HSS | \
633 IXP4XX_FEATURE_UTOPIA | \
634 IXP4XX_FEATURE_NPEB_ETH0 | \
635 IXP4XX_FEATURE_NPEC_ETH | \
636 IXP4XX_FEATURE_RESET_NPEA | \
637 IXP4XX_FEATURE_RESET_NPEB | \
638 IXP4XX_FEATURE_RESET_NPEC | \
639 IXP4XX_FEATURE_PCI | \
640 IXP4XX_FEATURE_UTOPIA_PHY_LIMIT | \
641 IXP4XX_FEATURE_XSCALE_MAX_FREQ)
642
643
644/* IXP43x/46x CPUs */
645#define IXP4XX_FEATURE_ECC_TIMESYNC (1 << 15)
624#define IXP4XX_FEATURE_USB_HOST (1 << 18) 646#define IXP4XX_FEATURE_USB_HOST (1 << 18)
625#define IXP4XX_FEATURE_NPEA_ETH (1 << 19) 647#define IXP4XX_FEATURE_NPEA_ETH (1 << 19)
648#define IXP43X_FEATURE_MASK (IXP42X_FEATURE_MASK | \
649 IXP4XX_FEATURE_ECC_TIMESYNC | \
650 IXP4XX_FEATURE_USB_HOST | \
651 IXP4XX_FEATURE_NPEA_ETH)
652
653/* IXP46x CPU (including IXP455) only */
626#define IXP4XX_FEATURE_NPEB_ETH_1_TO_3 (1 << 20) 654#define IXP4XX_FEATURE_NPEB_ETH_1_TO_3 (1 << 20)
627#define IXP4XX_FEATURE_RSA (1 << 21) 655#define IXP4XX_FEATURE_RSA (1 << 21)
628#define IXP4XX_FEATURE_XSCALE_MAX_FREQ (3 << 22) 656#define IXP46X_FEATURE_MASK (IXP43X_FEATURE_MASK | \
629#define IXP4XX_FEATURE_RESERVED (0xFF << 24) 657 IXP4XX_FEATURE_NPEB_ETH_1_TO_3 | \
630 658 IXP4XX_FEATURE_RSA)
631#define IXP4XX_FEATURE_IXP46X_ONLY (IXP4XX_FEATURE_ECC_TIMESYNC | \
632 IXP4XX_FEATURE_USB_HOST | \
633 IXP4XX_FEATURE_NPEA_ETH | \
634 IXP4XX_FEATURE_NPEB_ETH_1_TO_3 | \
635 IXP4XX_FEATURE_RSA | \
636 IXP4XX_FEATURE_XSCALE_MAX_FREQ)
637 659
638#endif 660#endif