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authorSeungwhan Youn <sw.youn@samsung.com>2010-10-19 05:13:11 -0400
committerKukjin Kim <kgene.kim@samsung.com>2010-10-25 03:10:42 -0400
commitb05d85350cce3f7da40cefd29305571f6230fbf7 (patch)
tree6ae62f4dd2659521e7e52d34e5fcaaf7c13a3fb0 /arch
parent313068fd3c23f5a6126e8dc8add84c018473e5ce (diff)
ARM: S5P64X0: Set DMA clock disable as default
This patch modify to DMA operation clock into disable list for default clock setting. Signed-off-by: Seungwhan Youn <sw.youn@samsung.com> Acked-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-s5p64x0/clock-s5p6440.c12
-rw-r--r--arch/arm/mach-s5p64x0/clock-s5p6450.c12
2 files changed, 12 insertions, 12 deletions
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c
index 0d728d3383b..e4883dc1c8d 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6440.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c
@@ -153,6 +153,12 @@ static struct clk init_clocks_disable[] = {
153 .enable = s5p64x0_hclk0_ctrl, 153 .enable = s5p64x0_hclk0_ctrl,
154 .ctrlbit = (1 << 8), 154 .ctrlbit = (1 << 8),
155 }, { 155 }, {
156 .name = "pdma",
157 .id = -1,
158 .parent = &clk_hclk_low.clk,
159 .enable = s5p64x0_hclk0_ctrl,
160 .ctrlbit = (1 << 12),
161 }, {
156 .name = "hsmmc", 162 .name = "hsmmc",
157 .id = 0, 163 .id = 0,
158 .parent = &clk_hclk_low.clk, 164 .parent = &clk_hclk_low.clk,
@@ -334,12 +340,6 @@ static struct clk init_clocks[] = {
334 .enable = s5p64x0_hclk0_ctrl, 340 .enable = s5p64x0_hclk0_ctrl,
335 .ctrlbit = (1 << 21), 341 .ctrlbit = (1 << 21),
336 }, { 342 }, {
337 .name = "dma",
338 .id = -1,
339 .parent = &clk_hclk_low.clk,
340 .enable = s5p64x0_hclk0_ctrl,
341 .ctrlbit = (1 << 12),
342 }, {
343 .name = "uart", 343 .name = "uart",
344 .id = 0, 344 .id = 0,
345 .parent = &clk_pclk_low.clk, 345 .parent = &clk_pclk_low.clk,
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c
index 1b9b0f92d17..7dbf3c968f5 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6450.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c
@@ -189,6 +189,12 @@ static struct clk init_clocks_disable[] = {
189 .enable = s5p64x0_hclk0_ctrl, 189 .enable = s5p64x0_hclk0_ctrl,
190 .ctrlbit = (1 << 3), 190 .ctrlbit = (1 << 3),
191 }, { 191 }, {
192 .name = "pdma",
193 .id = -1,
194 .parent = &clk_hclk_low.clk,
195 .enable = s5p64x0_hclk0_ctrl,
196 .ctrlbit = (1 << 12),
197 }, {
192 .name = "hsmmc", 198 .name = "hsmmc",
193 .id = 0, 199 .id = 0,
194 .parent = &clk_hclk_low.clk, 200 .parent = &clk_hclk_low.clk,
@@ -286,12 +292,6 @@ static struct clk init_clocks[] = {
286 .enable = s5p64x0_hclk0_ctrl, 292 .enable = s5p64x0_hclk0_ctrl,
287 .ctrlbit = (1 << 21), 293 .ctrlbit = (1 << 21),
288 }, { 294 }, {
289 .name = "dma",
290 .id = -1,
291 .parent = &clk_hclk_low.clk,
292 .enable = s5p64x0_hclk0_ctrl,
293 .ctrlbit = (1 << 12),
294 }, {
295 .name = "uart", 295 .name = "uart",
296 .id = 0, 296 .id = 0,
297 .parent = &clk_pclk_low.clk, 297 .parent = &clk_pclk_low.clk,