diff options
author | Graf Yang <graf.yang@analog.com> | 2010-02-01 01:07:50 -0500 |
---|---|---|
committer | Mike Frysinger <vapier@gentoo.org> | 2010-03-09 00:30:50 -0500 |
commit | 718340f62900ed44046d2b0f74d0dec7cf844194 (patch) | |
tree | 974cf52038196598c653902de3da83ca96ee3792 /arch | |
parent | 6c2b7072a7035837998da38809f98e4182e4c41c (diff) |
Blackfin: rewrite resync_core_{i,d}cache() SMP logic to avoid per_cpu data
This functions are implicitly called by core functions like cpu_relax(),
and since those functions may be called early on before common code has
initialized the per-cpu data area, we need to tweak the stats gathering.
Now the statistics are maintained in common bss which makes these funcs
safe to use as soon as the C runtime env is setup.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/blackfin/include/asm/cpu.h | 2 | ||||
-rw-r--r-- | arch/blackfin/include/asm/smp.h | 7 | ||||
-rw-r--r-- | arch/blackfin/kernel/setup.c | 4 | ||||
-rw-r--r-- | arch/blackfin/mach-common/smp.c | 6 |
4 files changed, 13 insertions, 6 deletions
diff --git a/arch/blackfin/include/asm/cpu.h b/arch/blackfin/include/asm/cpu.h index b191dc662bd..16883e582e3 100644 --- a/arch/blackfin/include/asm/cpu.h +++ b/arch/blackfin/include/asm/cpu.h | |||
@@ -17,8 +17,6 @@ struct blackfin_cpudata { | |||
17 | struct task_struct *idle; | 17 | struct task_struct *idle; |
18 | unsigned int imemctl; | 18 | unsigned int imemctl; |
19 | unsigned int dmemctl; | 19 | unsigned int dmemctl; |
20 | unsigned long dcache_invld_count; | ||
21 | unsigned long icache_invld_count; | ||
22 | }; | 20 | }; |
23 | 21 | ||
24 | DECLARE_PER_CPU(struct blackfin_cpudata, cpu_data); | 22 | DECLARE_PER_CPU(struct blackfin_cpudata, cpu_data); |
diff --git a/arch/blackfin/include/asm/smp.h b/arch/blackfin/include/asm/smp.h index 7f26de09ca9..f5b53796711 100644 --- a/arch/blackfin/include/asm/smp.h +++ b/arch/blackfin/include/asm/smp.h | |||
@@ -24,6 +24,13 @@ struct corelock_slot { | |||
24 | }; | 24 | }; |
25 | extern struct corelock_slot corelock; | 25 | extern struct corelock_slot corelock; |
26 | 26 | ||
27 | #ifdef __ARCH_SYNC_CORE_ICACHE | ||
28 | extern unsigned long icache_invld_count[NR_CPUS]; | ||
29 | #endif | ||
30 | #ifdef __ARCH_SYNC_CORE_DCACHE | ||
31 | extern unsigned long dcache_invld_count[NR_CPUS]; | ||
32 | #endif | ||
33 | |||
27 | void smp_icache_flush_range_others(unsigned long start, | 34 | void smp_icache_flush_range_others(unsigned long start, |
28 | unsigned long end); | 35 | unsigned long end); |
29 | #ifdef CONFIG_HOTPLUG_CPU | 36 | #ifdef CONFIG_HOTPLUG_CPU |
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index b54ba45db5f..8e2efceb364 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c | |||
@@ -1239,10 +1239,10 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
1239 | dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS, | 1239 | dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS, |
1240 | BFIN_DLINES); | 1240 | BFIN_DLINES); |
1241 | #ifdef __ARCH_SYNC_CORE_DCACHE | 1241 | #ifdef __ARCH_SYNC_CORE_DCACHE |
1242 | seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", cpudata->dcache_invld_count); | 1242 | seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", dcache_invld_count[cpu_num]); |
1243 | #endif | 1243 | #endif |
1244 | #ifdef __ARCH_SYNC_CORE_ICACHE | 1244 | #ifdef __ARCH_SYNC_CORE_ICACHE |
1245 | seq_printf(m, "SMP Icache Flushes\t: %lu\n\n", cpudata->icache_invld_count); | 1245 | seq_printf(m, "SMP Icache Flushes\t: %lu\n\n", icache_invld_count[cpu_num]); |
1246 | #endif | 1246 | #endif |
1247 | 1247 | ||
1248 | if (cpu_num != num_possible_cpus() - 1) | 1248 | if (cpu_num != num_possible_cpus() - 1) |
diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c index efc47ffd066..7803f22d2ca 100644 --- a/arch/blackfin/mach-common/smp.c +++ b/arch/blackfin/mach-common/smp.c | |||
@@ -474,24 +474,26 @@ void smp_icache_flush_range_others(unsigned long start, unsigned long end) | |||
474 | EXPORT_SYMBOL_GPL(smp_icache_flush_range_others); | 474 | EXPORT_SYMBOL_GPL(smp_icache_flush_range_others); |
475 | 475 | ||
476 | #ifdef __ARCH_SYNC_CORE_ICACHE | 476 | #ifdef __ARCH_SYNC_CORE_ICACHE |
477 | unsigned long icache_invld_count[NR_CPUS]; | ||
477 | void resync_core_icache(void) | 478 | void resync_core_icache(void) |
478 | { | 479 | { |
479 | unsigned int cpu = get_cpu(); | 480 | unsigned int cpu = get_cpu(); |
480 | blackfin_invalidate_entire_icache(); | 481 | blackfin_invalidate_entire_icache(); |
481 | ++per_cpu(cpu_data, cpu).icache_invld_count; | 482 | icache_invld_count[cpu]++; |
482 | put_cpu(); | 483 | put_cpu(); |
483 | } | 484 | } |
484 | EXPORT_SYMBOL(resync_core_icache); | 485 | EXPORT_SYMBOL(resync_core_icache); |
485 | #endif | 486 | #endif |
486 | 487 | ||
487 | #ifdef __ARCH_SYNC_CORE_DCACHE | 488 | #ifdef __ARCH_SYNC_CORE_DCACHE |
489 | unsigned long dcache_invld_count[NR_CPUS]; | ||
488 | unsigned long barrier_mask __attribute__ ((__section__(".l2.bss"))); | 490 | unsigned long barrier_mask __attribute__ ((__section__(".l2.bss"))); |
489 | 491 | ||
490 | void resync_core_dcache(void) | 492 | void resync_core_dcache(void) |
491 | { | 493 | { |
492 | unsigned int cpu = get_cpu(); | 494 | unsigned int cpu = get_cpu(); |
493 | blackfin_invalidate_entire_dcache(); | 495 | blackfin_invalidate_entire_dcache(); |
494 | ++per_cpu(cpu_data, cpu).dcache_invld_count; | 496 | dcache_invld_count[cpu]++; |
495 | put_cpu(); | 497 | put_cpu(); |
496 | } | 498 | } |
497 | EXPORT_SYMBOL(resync_core_dcache); | 499 | EXPORT_SYMBOL(resync_core_dcache); |