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authorWill Deacon <will.deacon@arm.com>2010-09-28 09:02:02 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-10-04 14:20:14 -0400
commit475d92fc6e72cd123dc5dbb9e70cdb80b0cfdf2d (patch)
treec2c3e98575957a0eab1492da35921c982c5d2e1e /arch
parentc6ea21e35bf3691cad59647c771e6606067f627d (diff)
ARM: 6416/1: errata: faulty hazard checking in the Store Buffer may lead to data corruption
On the r2p0, r2p1 and r2p2 versions of the Cortex-A9, data corruption can occur under very rare conditions due to a store buffer optimisation. This workaround sets a bit in the diagnostic register of the Cortex-A9, disabling the optimisation and preventing the problem from occurring. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig14
-rw-r--r--arch/arm/mm/proc-v7.S8
2 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 88c97bc7a6f..9c26ba7244f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1101,6 +1101,20 @@ config ARM_ERRATA_720789
1101 invalidated are not, resulting in an incoherency in the system page 1101 invalidated are not, resulting in an incoherency in the system page
1102 tables. The workaround changes the TLB flushing routines to invalidate 1102 tables. The workaround changes the TLB flushing routines to invalidate
1103 entries regardless of the ASID. 1103 entries regardless of the ASID.
1104
1105config ARM_ERRATA_743622
1106 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1107 depends on CPU_V7
1108 help
1109 This option enables the workaround for the 743622 Cortex-A9
1110 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1111 optimisation in the Cortex-A9 Store Buffer may lead to data
1112 corruption. This workaround sets a specific bit in the diagnostic
1113 register of the Cortex-A9 which disables the Store Buffer
1114 optimisation, preventing the defect from occurring. This has no
1115 visible impact on the overall performance or power consumption of the
1116 processor.
1117
1104endmenu 1118endmenu
1105 1119
1106source "arch/arm/common/Kconfig" 1120source "arch/arm/common/Kconfig"
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 7563ff0141b..75619c55f13 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -253,6 +253,14 @@ __v7_setup:
253 orreq r10, r10, #1 << 22 @ set bit #22 253 orreq r10, r10, #1 << 22 @ set bit #22
254 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register 254 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
255#endif 255#endif
256#ifdef CONFIG_ARM_ERRATA_743622
257 teq r6, #0x20 @ present in r2p0
258 teqne r6, #0x21 @ present in r2p1
259 teqne r6, #0x22 @ present in r2p2
260 mrceq p15, 0, r10, c15, c0, 1 @ read diagnostic register
261 orreq r10, r10, #1 << 6 @ set bit #6
262 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
263#endif
256 264
2573: mov r10, #0 2653: mov r10, #0
258#ifdef HARVARD_CACHE 266#ifdef HARVARD_CACHE