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authorYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>2007-02-08 22:16:24 -0500
committerRalf Baechle <ralf@linux-mips.org>2007-02-19 20:26:42 -0500
commit0cfd5267476ce8051c4447988d2b0377d09188e8 (patch)
treef4873136c4bf0f90eec7e9b3998ba11ac98d56d3 /arch
parente03b526932a9ae1ff20b47459c040f3c6407f625 (diff)
[MIPS] Cobalt: Fix UART I/O type
The Cobalt UART is actually connected to memory resource area. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/cobalt/setup.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c
index a4b69b543bd..415ff8710b5 100644
--- a/arch/mips/cobalt/setup.c
+++ b/arch/mips/cobalt/setup.c
@@ -130,7 +130,7 @@ void __init plat_mem_setup(void)
130 130
131 set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE)); 131 set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE));
132 132
133 /* I/O port resource must include UART and LCD/buttons */ 133 /* I/O port resource must include LCD/buttons */
134 ioport_resource.end = 0x0fffffff; 134 ioport_resource.end = 0x0fffffff;
135 135
136 /* request I/O space for devices used on all i[345]86 PCs */ 136 /* request I/O space for devices used on all i[345]86 PCs */
@@ -149,24 +149,24 @@ void __init plat_mem_setup(void)
149 register_pci_controller(&cobalt_pci_controller); 149 register_pci_controller(&cobalt_pci_controller);
150#endif 150#endif
151 151
152#ifdef CONFIG_SERIAL_8250
153 if (cobalt_board_id > COBALT_BRD_ID_RAQ1) { 152 if (cobalt_board_id > COBALT_BRD_ID_RAQ1) {
154
155#ifdef CONFIG_EARLY_PRINTK 153#ifdef CONFIG_EARLY_PRINTK
156 cobalt_early_console(); 154 cobalt_early_console();
157#endif 155#endif
158 156
157#ifdef CONFIG_SERIAL_8250
159 uart.line = 0; 158 uart.line = 0;
160 uart.type = PORT_UNKNOWN; 159 uart.type = PORT_UNKNOWN;
161 uart.uartclk = 18432000; 160 uart.uartclk = 18432000;
162 uart.irq = COBALT_SERIAL_IRQ; 161 uart.irq = COBALT_SERIAL_IRQ;
163 uart.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST; 162 uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF |
164 uart.iobase = 0xc800000; 163 UPF_SKIP_TEST;
165 uart.iotype = UPIO_PORT; 164 uart.iotype = UPIO_MEM;
165 uart.mapbase = 0x1c800000;
166 166
167 early_serial_setup(&uart); 167 early_serial_setup(&uart);
168 }
169#endif 168#endif
169 }
170} 170}
171 171
172/* 172/*