[PATCH] x86_64: Align and pad x86_64 GDT on page boundary

This patch is on the same lines as Zachary Amsden's i386 GDT page alignemnt
patch in -mm, but for x86_64.

Patch to align and pad x86_64 GDT on page boundries.

[AK: some minor cleanups and fixed incorrect TLS initialization
in CPU init.]

Signed-off-by: Nippun Goel <nippung@calsoftinc.com>
Signed-off-by: Ravikiran Thirumalai <kiran@scalex86.org>
Signed-off-by: Shai Fultheim <shai@scalex86.org>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

1 files changed, 3 insertions, 5 deletions

diff --git a/arch/x86_64/kernel/setup64.c b/arch/x86_64/kernel/setup64.c
index 39e728cfe6a..972f5d4ce82 100644
--- a/arch/x86_64/kernel/setup64.c
+++ b/arch/x86_64/kernel/setup64.c
@@ -213,16 +213,14 @@ void __cpuinit cpu_init (void)
          * Initialize the per-CPU GDT with the boot GDT,
          * and set up the GDT descriptor:
          */
-        if (cpu) {
-                memcpy(cpu_gdt_table[cpu], cpu_gdt_table[0], GDT_SIZE);
-        }       
+        if (cpu)
+                memcpy(cpu_gdt(cpu), cpu_gdt_table, GDT_SIZE);
 
         cpu_gdt_descr[cpu].size = GDT_SIZE;
-        cpu_gdt_descr[cpu].address = (unsigned long)cpu_gdt_table[cpu];
         asm volatile("lgdt %0" :: "m" (cpu_gdt_descr[cpu]));
         asm volatile("lidt %0" :: "m" (idt_descr));
 
-        memcpy(me->thread.tls_array, cpu_gdt_table[cpu], GDT_ENTRY_TLS_ENTRIES * 8);
+        memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);
         syscall_init();
 
         wrmsrl(MSR_FS_BASE, 0);