diff options
author | Richard Kennedy <richard@rsk.demon.co.uk> | 2008-11-24 08:53:24 -0500 |
---|---|---|
committer | Joerg Roedel <joerg.roedel@amd.com> | 2008-12-03 06:20:46 -0500 |
commit | eac9fbc6a90ab3440f4d98a8c52b15a724fc6f4f (patch) | |
tree | 689eb26c27ff1e673fd14b9914a4bb25c8586325 /arch/x86 | |
parent | 061e41fdb5047b1fb161e89664057835935ca1d2 (diff) |
AMD IOMMU: struct amd_iommu remove padding on 64 bit
Remove 16 bytes of padding from struct amd_iommu on 64bit builds
reducing its size to 120 bytes, allowing it to span one fewer
cachelines.
Signed-off-by: Richard Kennedy <richard@rsk.demon.co.uk>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/include/asm/amd_iommu_types.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/x86/include/asm/amd_iommu_types.h b/arch/x86/include/asm/amd_iommu_types.h index 1a30c0440c6..ac302a2fa33 100644 --- a/arch/x86/include/asm/amd_iommu_types.h +++ b/arch/x86/include/asm/amd_iommu_types.h | |||
@@ -251,13 +251,6 @@ struct amd_iommu { | |||
251 | /* Pointer to PCI device of this IOMMU */ | 251 | /* Pointer to PCI device of this IOMMU */ |
252 | struct pci_dev *dev; | 252 | struct pci_dev *dev; |
253 | 253 | ||
254 | /* | ||
255 | * Capability pointer. There could be more than one IOMMU per PCI | ||
256 | * device function if there are more than one AMD IOMMU capability | ||
257 | * pointers. | ||
258 | */ | ||
259 | u16 cap_ptr; | ||
260 | |||
261 | /* physical address of MMIO space */ | 254 | /* physical address of MMIO space */ |
262 | u64 mmio_phys; | 255 | u64 mmio_phys; |
263 | /* virtual address of MMIO space */ | 256 | /* virtual address of MMIO space */ |
@@ -266,6 +259,13 @@ struct amd_iommu { | |||
266 | /* capabilities of that IOMMU read from ACPI */ | 259 | /* capabilities of that IOMMU read from ACPI */ |
267 | u32 cap; | 260 | u32 cap; |
268 | 261 | ||
262 | /* | ||
263 | * Capability pointer. There could be more than one IOMMU per PCI | ||
264 | * device function if there are more than one AMD IOMMU capability | ||
265 | * pointers. | ||
266 | */ | ||
267 | u16 cap_ptr; | ||
268 | |||
269 | /* pci domain of this IOMMU */ | 269 | /* pci domain of this IOMMU */ |
270 | u16 pci_seg; | 270 | u16 pci_seg; |
271 | 271 | ||
@@ -284,19 +284,19 @@ struct amd_iommu { | |||
284 | /* size of command buffer */ | 284 | /* size of command buffer */ |
285 | u32 cmd_buf_size; | 285 | u32 cmd_buf_size; |
286 | 286 | ||
287 | /* event buffer virtual address */ | ||
288 | u8 *evt_buf; | ||
289 | /* size of event buffer */ | 287 | /* size of event buffer */ |
290 | u32 evt_buf_size; | 288 | u32 evt_buf_size; |
289 | /* event buffer virtual address */ | ||
290 | u8 *evt_buf; | ||
291 | /* MSI number for event interrupt */ | 291 | /* MSI number for event interrupt */ |
292 | u16 evt_msi_num; | 292 | u16 evt_msi_num; |
293 | 293 | ||
294 | /* if one, we need to send a completion wait command */ | ||
295 | int need_sync; | ||
296 | |||
297 | /* true if interrupts for this IOMMU are already enabled */ | 294 | /* true if interrupts for this IOMMU are already enabled */ |
298 | bool int_enabled; | 295 | bool int_enabled; |
299 | 296 | ||
297 | /* if one, we need to send a completion wait command */ | ||
298 | int need_sync; | ||
299 | |||
300 | /* default dma_ops domain for that IOMMU */ | 300 | /* default dma_ops domain for that IOMMU */ |
301 | struct dma_ops_domain *default_dom; | 301 | struct dma_ops_domain *default_dom; |
302 | }; | 302 | }; |