x86: fix i486 suspend to disk CR4 oops

arch/x86/power/cpu_32.c __save_processor_state calls read_cr4()
only a i486 CPU doesn't have the CR4 register.  Trying to read it
produces an invalid opcode oops during suspend to disk.

Use the safe rc4 reading op instead. If the value to be written is
zero the write is skipped.

arch/x86/power/hibernate_asm_32.S
done: swapped the use of %eax and %ecx to use jecxz for
the zero test and jump over store to %cr4.
restore_image: s/%ecx/%eax/ to be consistent with done:

In addition to __save_processor_state, acpi_save_state_mem,
efi_call_phys_prelog, and efi_call_phys_epilog had checks added
(acpi restore was in assembly and already had a check for
non-zero).  There were other reads and writes of CR4, but MCE and
virtualization shouldn't be executed on a i486 anyway.

Signed-off-by: David Fries <david@fries.net>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

1 files changed, 15 insertions, 11 deletions

diff --git a/arch/x86/power/hibernate_asm_32.S b/arch/x86/power/hibernate_asm_32.S
index b95aa6cfe3c..4fc7e872c85 100644
--- a/arch/x86/power/hibernate_asm_32.S
+++ b/arch/x86/power/hibernate_asm_32.S
@@ -28,9 +28,9 @@ ENTRY(swsusp_arch_suspend)
         ret
 
 ENTRY(restore_image)
-        movl    resume_pg_dir, %ecx
-        subl    $__PAGE_OFFSET, %ecx
-        movl    %ecx, %cr3
+        movl    resume_pg_dir, %eax
+        subl    $__PAGE_OFFSET, %eax
+        movl    %eax, %cr3
 
         movl    restore_pblist, %edx
         .p2align 4,,7
@@ -52,17 +52,21 @@ copy_loop:
 
 done:
         /* go back to the original page tables */
-        movl    $swapper_pg_dir, %ecx
-        subl    $__PAGE_OFFSET, %ecx
-        movl    %ecx, %cr3
+        movl    $swapper_pg_dir, %eax
+        subl    $__PAGE_OFFSET, %eax
+        movl    %eax, %cr3
         /* Flush TLB, including "global" things (vmalloc) */
-        movl    mmu_cr4_features, %eax
-        movl    %eax, %edx
+        movl    mmu_cr4_features, %ecx
+        jecxz   1f      # cr4 Pentium and higher, skip if zero
+        movl    %ecx, %edx
         andl    $~(1<<7), %edx;  # PGE
         movl    %edx, %cr4;  # turn off PGE
-        movl    %cr3, %ecx;  # flush TLB
-        movl    %ecx, %cr3
-        movl    %eax, %cr4;  # turn PGE back on
+1:
+        movl    %cr3, %eax;  # flush TLB
+        movl    %eax, %cr3
+        jecxz   1f      # cr4 Pentium and higher, skip if zero
+        movl    %ecx, %cr4;  # turn PGE back on
+1:
 
         movl saved_context_esp, %esp
         movl saved_context_ebp, %ebp