x86/oprofile: introduce oprofile_add_data64()

The IBS implemention writes 64 bit register values to the cpu buffer
by writing two 32 values using oprofile_add_data(). This patch
introduces oprofile_add_data64() to write a single 64 bit value to the
buffer.

Signed-off-by: Robert Richter <robert.richter@amd.com>

1 files changed, 9 insertions, 18 deletions

diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c
index 6493ef7ae9a..cc930467575 100644
--- a/arch/x86/oprofile/op_model_amd.c
+++ b/arch/x86/oprofile/op_model_amd.c
@@ -140,13 +140,10 @@ op_amd_handle_ibs(struct pt_regs * const regs,
                         rdmsrl(MSR_AMD64_IBSFETCHLINAD, val);
                         oprofile_write_reserve(&entry, regs, val,
                                                IBS_FETCH_CODE, IBS_FETCH_SIZE);
-                        oprofile_add_data(&entry, (u32)val);
-                        oprofile_add_data(&entry, (u32)(val >> 32));
-                        oprofile_add_data(&entry, (u32)ctl);
-                        oprofile_add_data(&entry, (u32)(ctl >> 32));
+                        oprofile_add_data64(&entry, val);
+                        oprofile_add_data64(&entry, ctl);
                         rdmsrl(MSR_AMD64_IBSFETCHPHYSAD, val);
-                        oprofile_add_data(&entry, (u32)val);
-                        oprofile_add_data(&entry, (u32)(val >> 32));
+                        oprofile_add_data64(&entry, val);
                         oprofile_write_commit(&entry);
 
                         /* reenable the IRQ */
@@ -162,23 +159,17 @@ op_amd_handle_ibs(struct pt_regs * const regs,
                         rdmsrl(MSR_AMD64_IBSOPRIP, val);
                         oprofile_write_reserve(&entry, regs, val,
                                                IBS_OP_CODE, IBS_OP_SIZE);
-                        oprofile_add_data(&entry, (u32)val);
-                        oprofile_add_data(&entry, (u32)(val >> 32));
+                        oprofile_add_data64(&entry, val);
                         rdmsrl(MSR_AMD64_IBSOPDATA, val);
-                        oprofile_add_data(&entry, (u32)val);
-                        oprofile_add_data(&entry, (u32)(val >> 32));
+                        oprofile_add_data64(&entry, val);
                         rdmsrl(MSR_AMD64_IBSOPDATA2, val);
-                        oprofile_add_data(&entry, (u32)val);
-                        oprofile_add_data(&entry, (u32)(val >> 32));
+                        oprofile_add_data64(&entry, val);
                         rdmsrl(MSR_AMD64_IBSOPDATA3, val);
-                        oprofile_add_data(&entry, (u32)val);
-                        oprofile_add_data(&entry, (u32)(val >> 32));
+                        oprofile_add_data64(&entry, val);
                         rdmsrl(MSR_AMD64_IBSDCLINAD, val);
-                        oprofile_add_data(&entry, (u32)val);
-                        oprofile_add_data(&entry, (u32)(val >> 32));
+                        oprofile_add_data64(&entry, val);
                         rdmsrl(MSR_AMD64_IBSDCPHYSAD, val);
-                        oprofile_add_data(&entry, (u32)val);
-                        oprofile_add_data(&entry, (u32)(val >> 32));
+                        oprofile_add_data64(&entry, val);
                         oprofile_write_commit(&entry);
 
                         /* reenable the IRQ */