iommu/amd: Make sure IOMMU interrupts are re-enabled on resume

commit 9ddd592a191b32f2ee6c4b6ed2bd52665c3a49f5 upstream.

Unfortunatly the interrupts for the event log and the
peripheral page-faults are only enabled at boot but not
re-enabled at resume. Fix that.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
[bwh: Backport to 3.0:
 - Drop change to PPR log which was added in 3.3
  - Source is under arch/x86/kernel]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

1 files changed, 17 insertions, 7 deletions

diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index bfc8453bd98..33df6e82f65 100644
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -1031,8 +1031,9 @@ static int iommu_setup_msi(struct amd_iommu *iommu)
 {
         int r;
 
-        if (pci_enable_msi(iommu->dev))
-                return 1;
+        r = pci_enable_msi(iommu->dev);
+        if (r)
+                return r;
 
         r = request_threaded_irq(iommu->dev->irq,
                                  amd_iommu_int_handler,
@@ -1042,24 +1043,33 @@ static int iommu_setup_msi(struct amd_iommu *iommu)
 
         if (r) {
                 pci_disable_msi(iommu->dev);
-                return 1;
+                return r;
         }
 
         iommu->int_enabled = true;
-        iommu_feature_enable(iommu, CONTROL_EVT_INT_EN);
 
         return 0;
 }
 
 static int iommu_init_msi(struct amd_iommu *iommu)
 {
+        int ret;
+
         if (iommu->int_enabled)
-                return 0;
+                goto enable_faults;
 
         if (pci_find_capability(iommu->dev, PCI_CAP_ID_MSI))
-                return iommu_setup_msi(iommu);
+                ret = iommu_setup_msi(iommu);
+        else
+                ret = -ENODEV;
 
-        return 1;
+        if (ret)
+                return ret;
+
+enable_faults:
+        iommu_feature_enable(iommu, CONTROL_EVT_INT_EN);
+
+        return 0;
 }
 
 /****************************************************************************