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author | Ingo Molnar <mingo@elte.hu> | 2008-01-30 07:32:38 -0500 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-01-30 07:32:38 -0500 |
commit | 6d5f718a497375f853d90247f5f6963368e89803 (patch) | |
tree | 217745cfd6bc0cd6ed28a98f402b54a2ce7a5471 /arch/x86/kernel/cpu | |
parent | 707fa8ed923b1b6a3d7af0d386b0b3abad28ed19 (diff) |
x86: lfence fix
LFENCE is available on XMM2 or higher Intel CPUs - not XMM or higher...
this caused boot failures on XMM1 & !XMM1 capable CPUs.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/kernel/cpu')
-rw-r--r-- | arch/x86/kernel/cpu/intel.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 0a4abdb61ae..5731de3e1bd 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c | |||
@@ -203,7 +203,7 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) | |||
203 | } | 203 | } |
204 | #endif | 204 | #endif |
205 | 205 | ||
206 | if (cpu_has_xmm) | 206 | if (cpu_has_xmm2) |
207 | set_bit(X86_FEATURE_LFENCE_RDTSC, c->x86_capability); | 207 | set_bit(X86_FEATURE_LFENCE_RDTSC, c->x86_capability); |
208 | if (c->x86 == 15) { | 208 | if (c->x86 == 15) { |
209 | set_bit(X86_FEATURE_P4, c->x86_capability); | 209 | set_bit(X86_FEATURE_P4, c->x86_capability); |