diff options
author | Min Zhang <mzhang@mvista.com> | 2008-01-30 07:32:11 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-01-30 07:32:11 -0500 |
commit | 9e8b6d90ac973939c4605236d140ae64d459622b (patch) | |
tree | fb568a0eacf4a972bb58646eb8f29280063dfe9d /arch/x86/kernel/cpu/mcheck | |
parent | 8b2cb7a8f531d6ca72a8aff873b9bb1c6b3122ba (diff) |
arch/x86/kernel/cpu/mcheck/p4.c: cleanups
SMP, the machine check exception dispatches all logical processors within a
physical package to the machine-check exception handler, so the printk
within each handler outputs concurrently and makes the output unreadable.
Refer to Intel system programming guide Part 1 Section 7.8.5
http://developer.intel.com/design/processor/manuals/253668.pdf
Signed-off-by: Min Zhang <mzhang@mvista.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/kernel/cpu/mcheck')
-rw-r--r-- | arch/x86/kernel/cpu/mcheck/k7.c | 11 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/mcheck/p4.c | 21 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/mcheck/p6.c | 11 |
3 files changed, 26 insertions, 17 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/k7.c b/arch/x86/kernel/cpu/mcheck/k7.c index 39fa76fd385..9e929409fd7 100644 --- a/arch/x86/kernel/cpu/mcheck/k7.c +++ b/arch/x86/kernel/cpu/mcheck/k7.c | |||
@@ -33,21 +33,24 @@ static void k7_machine_check(struct pt_regs * regs, long error_code) | |||
33 | for (i=1; i<nr_mce_banks; i++) { | 33 | for (i=1; i<nr_mce_banks; i++) { |
34 | rdmsr (MSR_IA32_MC0_STATUS+i*4,low, high); | 34 | rdmsr (MSR_IA32_MC0_STATUS+i*4,low, high); |
35 | if (high&(1<<31)) { | 35 | if (high&(1<<31)) { |
36 | char misc[20]; | ||
37 | char addr[24]; | ||
38 | misc[0] = addr[0] = '\0'; | ||
36 | if (high & (1<<29)) | 39 | if (high & (1<<29)) |
37 | recover |= 1; | 40 | recover |= 1; |
38 | if (high & (1<<25)) | 41 | if (high & (1<<25)) |
39 | recover |= 2; | 42 | recover |= 2; |
40 | printk (KERN_EMERG "Bank %d: %08x%08x", i, high, low); | ||
41 | high &= ~(1<<31); | 43 | high &= ~(1<<31); |
42 | if (high & (1<<27)) { | 44 | if (high & (1<<27)) { |
43 | rdmsr (MSR_IA32_MC0_MISC+i*4, alow, ahigh); | 45 | rdmsr (MSR_IA32_MC0_MISC+i*4, alow, ahigh); |
44 | printk ("[%08x%08x]", ahigh, alow); | 46 | snprintf (misc, 20, "[%08x%08x]", ahigh, alow); |
45 | } | 47 | } |
46 | if (high & (1<<26)) { | 48 | if (high & (1<<26)) { |
47 | rdmsr (MSR_IA32_MC0_ADDR+i*4, alow, ahigh); | 49 | rdmsr (MSR_IA32_MC0_ADDR+i*4, alow, ahigh); |
48 | printk (" at %08x%08x", ahigh, alow); | 50 | snprintf (addr, 24, " at %08x%08x", ahigh, alow); |
49 | } | 51 | } |
50 | printk ("\n"); | 52 | printk (KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n", |
53 | smp_processor_id(), i, high, low, misc, addr); | ||
51 | /* Clear it */ | 54 | /* Clear it */ |
52 | wrmsr (MSR_IA32_MC0_STATUS+i*4, 0UL, 0UL); | 55 | wrmsr (MSR_IA32_MC0_STATUS+i*4, 0UL, 0UL); |
53 | /* Serialize */ | 56 | /* Serialize */ |
diff --git a/arch/x86/kernel/cpu/mcheck/p4.c b/arch/x86/kernel/cpu/mcheck/p4.c index 16a6238dbc2..cb03a1b5050 100644 --- a/arch/x86/kernel/cpu/mcheck/p4.c +++ b/arch/x86/kernel/cpu/mcheck/p4.c | |||
@@ -158,32 +158,35 @@ static void intel_machine_check(struct pt_regs * regs, long error_code) | |||
158 | if (mce_num_extended_msrs > 0) { | 158 | if (mce_num_extended_msrs > 0) { |
159 | struct intel_mce_extended_msrs dbg; | 159 | struct intel_mce_extended_msrs dbg; |
160 | intel_get_extended_msrs(&dbg); | 160 | intel_get_extended_msrs(&dbg); |
161 | printk (KERN_DEBUG "CPU %d: EIP: %08x EFLAGS: %08x\n", | 161 | printk (KERN_DEBUG "CPU %d: EIP: %08x EFLAGS: %08x\n" |
162 | smp_processor_id(), dbg.eip, dbg.eflags); | 162 | "\teax: %08x ebx: %08x ecx: %08x edx: %08x\n" |
163 | printk (KERN_DEBUG "\teax: %08x ebx: %08x ecx: %08x edx: %08x\n", | 163 | "\tesi: %08x edi: %08x ebp: %08x esp: %08x\n", |
164 | dbg.eax, dbg.ebx, dbg.ecx, dbg.edx); | 164 | smp_processor_id(), dbg.eip, dbg.eflags, |
165 | printk (KERN_DEBUG "\tesi: %08x edi: %08x ebp: %08x esp: %08x\n", | 165 | dbg.eax, dbg.ebx, dbg.ecx, dbg.edx, |
166 | dbg.esi, dbg.edi, dbg.ebp, dbg.esp); | 166 | dbg.esi, dbg.edi, dbg.ebp, dbg.esp); |
167 | } | 167 | } |
168 | 168 | ||
169 | for (i=0; i<nr_mce_banks; i++) { | 169 | for (i=0; i<nr_mce_banks; i++) { |
170 | rdmsr (MSR_IA32_MC0_STATUS+i*4,low, high); | 170 | rdmsr (MSR_IA32_MC0_STATUS+i*4,low, high); |
171 | if (high & (1<<31)) { | 171 | if (high & (1<<31)) { |
172 | char misc[20]; | ||
173 | char addr[24]; | ||
174 | misc[0] = addr[0] = '\0'; | ||
172 | if (high & (1<<29)) | 175 | if (high & (1<<29)) |
173 | recover |= 1; | 176 | recover |= 1; |
174 | if (high & (1<<25)) | 177 | if (high & (1<<25)) |
175 | recover |= 2; | 178 | recover |= 2; |
176 | printk (KERN_EMERG "Bank %d: %08x%08x", i, high, low); | ||
177 | high &= ~(1<<31); | 179 | high &= ~(1<<31); |
178 | if (high & (1<<27)) { | 180 | if (high & (1<<27)) { |
179 | rdmsr (MSR_IA32_MC0_MISC+i*4, alow, ahigh); | 181 | rdmsr (MSR_IA32_MC0_MISC+i*4, alow, ahigh); |
180 | printk ("[%08x%08x]", ahigh, alow); | 182 | snprintf (misc, 20, "[%08x%08x]", ahigh, alow); |
181 | } | 183 | } |
182 | if (high & (1<<26)) { | 184 | if (high & (1<<26)) { |
183 | rdmsr (MSR_IA32_MC0_ADDR+i*4, alow, ahigh); | 185 | rdmsr (MSR_IA32_MC0_ADDR+i*4, alow, ahigh); |
184 | printk (" at %08x%08x", ahigh, alow); | 186 | snprintf (addr, 24, " at %08x%08x", ahigh, alow); |
185 | } | 187 | } |
186 | printk ("\n"); | 188 | printk (KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n", |
189 | smp_processor_id(), i, high, low, misc, addr); | ||
187 | } | 190 | } |
188 | } | 191 | } |
189 | 192 | ||
diff --git a/arch/x86/kernel/cpu/mcheck/p6.c b/arch/x86/kernel/cpu/mcheck/p6.c index cb3829e0798..b61f3038c4c 100644 --- a/arch/x86/kernel/cpu/mcheck/p6.c +++ b/arch/x86/kernel/cpu/mcheck/p6.c | |||
@@ -33,21 +33,24 @@ static void intel_machine_check(struct pt_regs * regs, long error_code) | |||
33 | for (i=0; i<nr_mce_banks; i++) { | 33 | for (i=0; i<nr_mce_banks; i++) { |
34 | rdmsr (MSR_IA32_MC0_STATUS+i*4,low, high); | 34 | rdmsr (MSR_IA32_MC0_STATUS+i*4,low, high); |
35 | if (high & (1<<31)) { | 35 | if (high & (1<<31)) { |
36 | char misc[20]; | ||
37 | char addr[24]; | ||
38 | misc[0] = addr[0] = '\0'; | ||
36 | if (high & (1<<29)) | 39 | if (high & (1<<29)) |
37 | recover |= 1; | 40 | recover |= 1; |
38 | if (high & (1<<25)) | 41 | if (high & (1<<25)) |
39 | recover |= 2; | 42 | recover |= 2; |
40 | printk (KERN_EMERG "Bank %d: %08x%08x", i, high, low); | ||
41 | high &= ~(1<<31); | 43 | high &= ~(1<<31); |
42 | if (high & (1<<27)) { | 44 | if (high & (1<<27)) { |
43 | rdmsr (MSR_IA32_MC0_MISC+i*4, alow, ahigh); | 45 | rdmsr (MSR_IA32_MC0_MISC+i*4, alow, ahigh); |
44 | printk ("[%08x%08x]", ahigh, alow); | 46 | snprintf (misc, 20, "[%08x%08x]", ahigh, alow); |
45 | } | 47 | } |
46 | if (high & (1<<26)) { | 48 | if (high & (1<<26)) { |
47 | rdmsr (MSR_IA32_MC0_ADDR+i*4, alow, ahigh); | 49 | rdmsr (MSR_IA32_MC0_ADDR+i*4, alow, ahigh); |
48 | printk (" at %08x%08x", ahigh, alow); | 50 | snprintf (addr, 24, " at %08x%08x", ahigh, alow); |
49 | } | 51 | } |
50 | printk ("\n"); | 52 | printk (KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n", |
53 | smp_processor_id(), i, high, low, misc, addr); | ||
51 | } | 54 | } |
52 | } | 55 | } |
53 | 56 | ||