diff options
author | David S. Miller <davem@sunset.davemloft.net> | 2007-03-16 20:20:28 -0400 |
---|---|---|
committer | David S. Miller <davem@sunset.davemloft.net> | 2007-03-16 20:20:28 -0400 |
commit | d1acb4210aaa9bdc413d276dbc96d0a23ada97ba (patch) | |
tree | b0ca2efd2b34e319aeb09c451d89fd1c9dc47ba3 /arch/sparc64/mm/init.c | |
parent | db98e0b434a6265c451ffe94ec0a29b8d0aaf587 (diff) |
[SPARC64]: Get DEBUG_PAGEALLOC working again.
We have to make sure to use base-pagesize TLB entries even during the
early transition period where we need TLB miss handling but don't have
the kernel page tables setup yet for the linear region.
Also, it is necessary therefore to not use the 4MB TSB for these
translations, and instead use the normal kernel TSB. This allows us
to also get rid of the 4MB tsb for debug builds which shrinks the
kernel a little bit.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/mm/init.c')
-rw-r--r-- | arch/sparc64/mm/init.c | 30 |
1 files changed, 28 insertions, 2 deletions
diff --git a/arch/sparc64/mm/init.c b/arch/sparc64/mm/init.c index b1a1ee0cc6b..f146071a4b2 100644 --- a/arch/sparc64/mm/init.c +++ b/arch/sparc64/mm/init.c | |||
@@ -59,8 +59,10 @@ unsigned long kern_linear_pte_xor[2] __read_mostly; | |||
59 | */ | 59 | */ |
60 | unsigned long kpte_linear_bitmap[KPTE_BITMAP_BYTES / sizeof(unsigned long)]; | 60 | unsigned long kpte_linear_bitmap[KPTE_BITMAP_BYTES / sizeof(unsigned long)]; |
61 | 61 | ||
62 | #ifndef CONFIG_DEBUG_PAGEALLOC | ||
62 | /* A special kernel TSB for 4MB and 256MB linear mappings. */ | 63 | /* A special kernel TSB for 4MB and 256MB linear mappings. */ |
63 | struct tsb swapper_4m_tsb[KERNEL_TSB4M_NENTRIES]; | 64 | struct tsb swapper_4m_tsb[KERNEL_TSB4M_NENTRIES]; |
65 | #endif | ||
64 | 66 | ||
65 | #define MAX_BANKS 32 | 67 | #define MAX_BANKS 32 |
66 | 68 | ||
@@ -1301,7 +1303,12 @@ static void __init tsb_phys_patch(void) | |||
1301 | } | 1303 | } |
1302 | 1304 | ||
1303 | /* Don't mark as init, we give this to the Hypervisor. */ | 1305 | /* Don't mark as init, we give this to the Hypervisor. */ |
1304 | static struct hv_tsb_descr ktsb_descr[2]; | 1306 | #ifndef CONFIG_DEBUG_PAGEALLOC |
1307 | #define NUM_KTSB_DESCR 2 | ||
1308 | #else | ||
1309 | #define NUM_KTSB_DESCR 1 | ||
1310 | #endif | ||
1311 | static struct hv_tsb_descr ktsb_descr[NUM_KTSB_DESCR]; | ||
1305 | extern struct tsb swapper_tsb[KERNEL_TSB_NENTRIES]; | 1312 | extern struct tsb swapper_tsb[KERNEL_TSB_NENTRIES]; |
1306 | 1313 | ||
1307 | static void __init sun4v_ktsb_init(void) | 1314 | static void __init sun4v_ktsb_init(void) |
@@ -1340,6 +1347,7 @@ static void __init sun4v_ktsb_init(void) | |||
1340 | ktsb_descr[0].tsb_base = ktsb_pa; | 1347 | ktsb_descr[0].tsb_base = ktsb_pa; |
1341 | ktsb_descr[0].resv = 0; | 1348 | ktsb_descr[0].resv = 0; |
1342 | 1349 | ||
1350 | #ifndef CONFIG_DEBUG_PAGEALLOC | ||
1343 | /* Second KTSB for 4MB/256MB mappings. */ | 1351 | /* Second KTSB for 4MB/256MB mappings. */ |
1344 | ktsb_pa = (kern_base + | 1352 | ktsb_pa = (kern_base + |
1345 | ((unsigned long)&swapper_4m_tsb[0] - KERNBASE)); | 1353 | ((unsigned long)&swapper_4m_tsb[0] - KERNBASE)); |
@@ -1352,6 +1360,7 @@ static void __init sun4v_ktsb_init(void) | |||
1352 | ktsb_descr[1].ctx_idx = 0; | 1360 | ktsb_descr[1].ctx_idx = 0; |
1353 | ktsb_descr[1].tsb_base = ktsb_pa; | 1361 | ktsb_descr[1].tsb_base = ktsb_pa; |
1354 | ktsb_descr[1].resv = 0; | 1362 | ktsb_descr[1].resv = 0; |
1363 | #endif | ||
1355 | } | 1364 | } |
1356 | 1365 | ||
1357 | void __cpuinit sun4v_ktsb_register(void) | 1366 | void __cpuinit sun4v_ktsb_register(void) |
@@ -1364,7 +1373,7 @@ void __cpuinit sun4v_ktsb_register(void) | |||
1364 | pa = kern_base + ((unsigned long)&ktsb_descr[0] - KERNBASE); | 1373 | pa = kern_base + ((unsigned long)&ktsb_descr[0] - KERNBASE); |
1365 | 1374 | ||
1366 | func = HV_FAST_MMU_TSB_CTX0; | 1375 | func = HV_FAST_MMU_TSB_CTX0; |
1367 | arg0 = 2; | 1376 | arg0 = NUM_KTSB_DESCR; |
1368 | arg1 = pa; | 1377 | arg1 = pa; |
1369 | __asm__ __volatile__("ta %6" | 1378 | __asm__ __volatile__("ta %6" |
1370 | : "=&r" (func), "=&r" (arg0), "=&r" (arg1) | 1379 | : "=&r" (func), "=&r" (arg0), "=&r" (arg1) |
@@ -1393,7 +1402,9 @@ void __init paging_init(void) | |||
1393 | 1402 | ||
1394 | /* Invalidate both kernel TSBs. */ | 1403 | /* Invalidate both kernel TSBs. */ |
1395 | memset(swapper_tsb, 0x40, sizeof(swapper_tsb)); | 1404 | memset(swapper_tsb, 0x40, sizeof(swapper_tsb)); |
1405 | #ifndef CONFIG_DEBUG_PAGEALLOC | ||
1396 | memset(swapper_4m_tsb, 0x40, sizeof(swapper_4m_tsb)); | 1406 | memset(swapper_4m_tsb, 0x40, sizeof(swapper_4m_tsb)); |
1407 | #endif | ||
1397 | 1408 | ||
1398 | if (tlb_type == hypervisor) | 1409 | if (tlb_type == hypervisor) |
1399 | sun4v_pgprot_init(); | 1410 | sun4v_pgprot_init(); |
@@ -1725,8 +1736,13 @@ static void __init sun4u_pgprot_init(void) | |||
1725 | pg_iobits = (_PAGE_VALID | _PAGE_PRESENT_4U | __DIRTY_BITS_4U | | 1736 | pg_iobits = (_PAGE_VALID | _PAGE_PRESENT_4U | __DIRTY_BITS_4U | |
1726 | __ACCESS_BITS_4U | _PAGE_E_4U); | 1737 | __ACCESS_BITS_4U | _PAGE_E_4U); |
1727 | 1738 | ||
1739 | #ifdef CONFIG_DEBUG_PAGEALLOC | ||
1740 | kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZBITS_4U) ^ | ||
1741 | 0xfffff80000000000; | ||
1742 | #else | ||
1728 | kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZ4MB_4U) ^ | 1743 | kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZ4MB_4U) ^ |
1729 | 0xfffff80000000000; | 1744 | 0xfffff80000000000; |
1745 | #endif | ||
1730 | kern_linear_pte_xor[0] |= (_PAGE_CP_4U | _PAGE_CV_4U | | 1746 | kern_linear_pte_xor[0] |= (_PAGE_CP_4U | _PAGE_CV_4U | |
1731 | _PAGE_P_4U | _PAGE_W_4U); | 1747 | _PAGE_P_4U | _PAGE_W_4U); |
1732 | 1748 | ||
@@ -1769,13 +1785,23 @@ static void __init sun4v_pgprot_init(void) | |||
1769 | _PAGE_E = _PAGE_E_4V; | 1785 | _PAGE_E = _PAGE_E_4V; |
1770 | _PAGE_CACHE = _PAGE_CACHE_4V; | 1786 | _PAGE_CACHE = _PAGE_CACHE_4V; |
1771 | 1787 | ||
1788 | #ifdef CONFIG_DEBUG_PAGEALLOC | ||
1789 | kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZBITS_4V) ^ | ||
1790 | 0xfffff80000000000; | ||
1791 | #else | ||
1772 | kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZ4MB_4V) ^ | 1792 | kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZ4MB_4V) ^ |
1773 | 0xfffff80000000000; | 1793 | 0xfffff80000000000; |
1794 | #endif | ||
1774 | kern_linear_pte_xor[0] |= (_PAGE_CP_4V | _PAGE_CV_4V | | 1795 | kern_linear_pte_xor[0] |= (_PAGE_CP_4V | _PAGE_CV_4V | |
1775 | _PAGE_P_4V | _PAGE_W_4V); | 1796 | _PAGE_P_4V | _PAGE_W_4V); |
1776 | 1797 | ||
1798 | #ifdef CONFIG_DEBUG_PAGEALLOC | ||
1799 | kern_linear_pte_xor[1] = (_PAGE_VALID | _PAGE_SZBITS_4V) ^ | ||
1800 | 0xfffff80000000000; | ||
1801 | #else | ||
1777 | kern_linear_pte_xor[1] = (_PAGE_VALID | _PAGE_SZ256MB_4V) ^ | 1802 | kern_linear_pte_xor[1] = (_PAGE_VALID | _PAGE_SZ256MB_4V) ^ |
1778 | 0xfffff80000000000; | 1803 | 0xfffff80000000000; |
1804 | #endif | ||
1779 | kern_linear_pte_xor[1] |= (_PAGE_CP_4V | _PAGE_CV_4V | | 1805 | kern_linear_pte_xor[1] |= (_PAGE_CP_4V | _PAGE_CV_4V | |
1780 | _PAGE_P_4V | _PAGE_W_4V); | 1806 | _PAGE_P_4V | _PAGE_W_4V); |
1781 | 1807 | ||