diff options
author | David S. Miller <davem@sunset.davemloft.net> | 2006-02-15 03:35:50 -0500 |
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committer | David S. Miller <davem@sunset.davemloft.net> | 2006-03-20 04:13:01 -0500 |
commit | f03b8a546868fcf43feb455b69b152eb867606b2 (patch) | |
tree | 147f1f63d824827de1d374dcd6741a38c7132b68 /arch/sparc64/kernel/smp.c | |
parent | 329c68b21896eea371edbfdf305c459fb74cf9a8 (diff) |
[SPARC64]: Use different cache sizing defaults on SUN4V.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/smp.c')
-rw-r--r-- | arch/sparc64/kernel/smp.c | 28 |
1 files changed, 21 insertions, 7 deletions
diff --git a/arch/sparc64/kernel/smp.c b/arch/sparc64/kernel/smp.c index c280e6742b2..64046d37bbf 100644 --- a/arch/sparc64/kernel/smp.c +++ b/arch/sparc64/kernel/smp.c | |||
@@ -78,7 +78,7 @@ void smp_bogo(struct seq_file *m) | |||
78 | 78 | ||
79 | void __init smp_store_cpu_info(int id) | 79 | void __init smp_store_cpu_info(int id) |
80 | { | 80 | { |
81 | int cpu_node; | 81 | int cpu_node, def; |
82 | 82 | ||
83 | /* multiplier and counter set by | 83 | /* multiplier and counter set by |
84 | smp_setup_percpu_timer() */ | 84 | smp_setup_percpu_timer() */ |
@@ -90,18 +90,32 @@ void __init smp_store_cpu_info(int id) | |||
90 | 90 | ||
91 | cpu_data(id).idle_volume = 1; | 91 | cpu_data(id).idle_volume = 1; |
92 | 92 | ||
93 | def = ((tlb_type == hypervisor) ? (8 * 1024) : (16 * 1024)); | ||
93 | cpu_data(id).dcache_size = prom_getintdefault(cpu_node, "dcache-size", | 94 | cpu_data(id).dcache_size = prom_getintdefault(cpu_node, "dcache-size", |
94 | 16 * 1024); | 95 | def); |
96 | |||
97 | def = 32; | ||
95 | cpu_data(id).dcache_line_size = | 98 | cpu_data(id).dcache_line_size = |
96 | prom_getintdefault(cpu_node, "dcache-line-size", 32); | 99 | prom_getintdefault(cpu_node, "dcache-line-size", def); |
100 | |||
101 | def = 16 * 1024; | ||
97 | cpu_data(id).icache_size = prom_getintdefault(cpu_node, "icache-size", | 102 | cpu_data(id).icache_size = prom_getintdefault(cpu_node, "icache-size", |
98 | 16 * 1024); | 103 | def); |
104 | |||
105 | def = 32; | ||
99 | cpu_data(id).icache_line_size = | 106 | cpu_data(id).icache_line_size = |
100 | prom_getintdefault(cpu_node, "icache-line-size", 32); | 107 | prom_getintdefault(cpu_node, "icache-line-size", def); |
108 | |||
109 | def = ((tlb_type == hypervisor) ? | ||
110 | (3 * 1024 * 1024) : | ||
111 | (4 * 1024 * 1024)); | ||
101 | cpu_data(id).ecache_size = prom_getintdefault(cpu_node, "ecache-size", | 112 | cpu_data(id).ecache_size = prom_getintdefault(cpu_node, "ecache-size", |
102 | 4 * 1024 * 1024); | 113 | def); |
114 | |||
115 | def = 64; | ||
103 | cpu_data(id).ecache_line_size = | 116 | cpu_data(id).ecache_line_size = |
104 | prom_getintdefault(cpu_node, "ecache-line-size", 64); | 117 | prom_getintdefault(cpu_node, "ecache-line-size", def); |
118 | |||
105 | printk("CPU[%d]: Caches " | 119 | printk("CPU[%d]: Caches " |
106 | "D[sz(%d):line_sz(%d)] " | 120 | "D[sz(%d):line_sz(%d)] " |
107 | "I[sz(%d):line_sz(%d)] " | 121 | "I[sz(%d):line_sz(%d)] " |