Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

Conflicts:
	arch/arm/mach-pxa/corgi.c
	arch/arm/mach-pxa/poodle.c
	arch/arm/mach-pxa/spitz.c

3 files changed, 75 insertions, 4 deletions

diff --git a/arch/sh/include/mach-se/mach/mrshpc.h b/arch/sh/include/mach-se/mach/mrshpc.h
new file mode 100644
index 00000000000..56287ee8563
--- /dev/null
+++ b/arch/sh/include/mach-se/mach/mrshpc.h
@@ -0,0 +1,52 @@
+#ifndef __MACH_SE_MRSHPC_H
+#define __MACH_SE_MRSHPC_H
+
+#include <linux/io.h>
+
+static inline void __init mrshpc_setup_windows(void)
+{
+        if ((__raw_readw(MRSHPC_CSR) & 0x000c) != 0)
+                return; /* Not detected */
+
+        if ((__raw_readw(MRSHPC_CSR) & 0x0080) == 0) {
+                __raw_writew(0x0674, MRSHPC_CPWCR); /* Card Vcc is 3.3v? */
+        } else {
+                __raw_writew(0x0678, MRSHPC_CPWCR); /* Card Vcc is 5V */
+        }
+
+        /*
+         *  PC-Card window open
+         *  flag == COMMON/ATTRIBUTE/IO
+         */
+        /* common window open */
+        __raw_writew(0x8a84, MRSHPC_MW0CR1);
+        if((__raw_readw(MRSHPC_CSR) & 0x4000) != 0)
+                /* common mode & bus width 16bit SWAP = 1*/
+                __raw_writew(0x0b00, MRSHPC_MW0CR2);
+        else
+                /* common mode & bus width 16bit SWAP = 0*/
+                __raw_writew(0x0300, MRSHPC_MW0CR2);
+
+        /* attribute window open */
+        __raw_writew(0x8a85, MRSHPC_MW1CR1);
+        if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0)
+                /* attribute mode & bus width 16bit SWAP = 1*/
+                __raw_writew(0x0a00, MRSHPC_MW1CR2);
+        else
+                /* attribute mode & bus width 16bit SWAP = 0*/
+                __raw_writew(0x0200, MRSHPC_MW1CR2);
+
+        /* I/O window open */
+        __raw_writew(0x8a86, MRSHPC_IOWCR1);
+        __raw_writew(0x0008, MRSHPC_CDCR);       /* I/O card mode */
+        if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0)
+                __raw_writew(0x0a00, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1*/
+        else
+                __raw_writew(0x0200, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0*/
+
+        __raw_writew(0x2000, MRSHPC_ICR);
+        __raw_writeb(0x00, PA_MRSHPC_MW2 + 0x206);
+        __raw_writeb(0x42, PA_MRSHPC_MW2 + 0x200);
+}
+
+#endif /* __MACH_SE_MRSHPC_H */
diff --git a/arch/sh/include/mach-se/mach/se.h b/arch/sh/include/mach-se/mach/se.h
index eb23000e1bb..14be91c5a2f 100644
--- a/arch/sh/include/mach-se/mach/se.h
+++ b/arch/sh/include/mach-se/mach/se.h
@@ -68,6 +68,24 @@
 #define BCR_ILCRF       (PA_BCR + 10)
 #define BCR_ILCRG       (PA_BCR + 12)
 
+#if defined(CONFIG_CPU_SUBTYPE_SH7709)
+#define INTC_IRR0       0xa4000004UL
+#define INTC_IRR1       0xa4000006UL
+#define INTC_IRR2       0xa4000008UL
+
+#define INTC_ICR0       0xfffffee0UL
+#define INTC_ICR1       0xa4000010UL
+#define INTC_ICR2       0xa4000012UL
+#define INTC_INTER      0xa4000014UL
+
+#define INTC_IPRC       0xa4000016UL
+#define INTC_IPRD       0xa4000018UL
+#define INTC_IPRE       0xa400001aUL
+
+#define IRQ0_IRQ        32
+#define IRQ1_IRQ        33
+#endif
+
 #if defined(CONFIG_CPU_SUBTYPE_SH7705)
 #define IRQ_STNIC       12
 #define IRQ_CFCARD      14
diff --git a/arch/sh/include/mach-se/mach/se7343.h b/arch/sh/include/mach-se/mach/se7343.h
index 98458460e63..749914b400f 100644
--- a/arch/sh/include/mach-se/mach/se7343.h
+++ b/arch/sh/include/mach-se/mach/se7343.h
@@ -118,9 +118,6 @@
 #define FPGA_IN         0xb1400000
 #define FPGA_OUT        0xb1400002
 
-#define __IO_PREFIX     sh7343se
-#include <asm/io_generic.h>
-
 #define IRQ0_IRQ        32
 #define IRQ1_IRQ        33
 #define IRQ4_IRQ        36
@@ -132,8 +129,10 @@
 #define SE7343_FPGA_IRQ_MRSHPC3 3
 #define SE7343_FPGA_IRQ_SMC     6       /* EXT_IRQ2 */
 #define SE7343_FPGA_IRQ_USB     8
+#define SE7343_FPGA_IRQ_UARTA   10
+#define SE7343_FPGA_IRQ_UARTB   11
 
-#define SE7343_FPGA_IRQ_NR      11
+#define SE7343_FPGA_IRQ_NR      12
 #define SE7343_FPGA_IRQ_BASE    120
 
 #define MRSHPC_IRQ3     (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC3)
@@ -142,6 +141,8 @@
 #define MRSHPC_IRQ0     (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC0)
 #define SMC_IRQ         (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_SMC)
 #define USB_IRQ         (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_USB)
+#define UARTA_IRQ       (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_UARTA)
+#define UARTB_IRQ       (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_UARTB)
 
 /* arch/sh/boards/se/7343/irq.c */
 void init_7343se_IRQ(void);