sh: Fix up the SH-5 build with caches enabled.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

1 files changed, 5 insertions, 0 deletions

diff --git a/arch/sh/include/asm/system_64.h b/arch/sh/include/asm/system_64.h
index 218b54d9d66..8e4a03e7966 100644
--- a/arch/sh/include/asm/system_64.h
+++ b/arch/sh/include/asm/system_64.h
@@ -37,6 +37,11 @@ do {								\
 #define jump_to_uncached()      do { } while (0)
 #define back_to_cached()        do { } while (0)
 
+#define __icbi(addr)    __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr))
+#define __ocbp(addr)    __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr))
+#define __ocbi(addr)    __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr))
+#define __ocbwb(addr)   __asm__ __volatile__ ( "ocbwb %0, 0\n\t" : : "r" (addr))
+
 static inline reg_size_t register_align(void *val)
 {
         return (unsigned long long)(signed long long)(signed long)val;