diff options
author | David Gibson <david@gibson.dropbear.id.au> | 2005-07-27 14:44:21 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-07-27 19:25:58 -0400 |
commit | 488f84994c55927eef587a0827dc957c908a0bad (patch) | |
tree | 34bdc42927e2eb559bd64039ed87508a440dffc6 /arch/ppc64/kernel/head.S | |
parent | 533f08172e21521a74e15cdef8a13c929596d506 (diff) |
[PATCH] ppc64: remove another fixed address constraint
Presently the LparMap, one of the structures the kernel shares with the
legacy iSeries hypervisor has a fixed offset address in head.S. This patch
changes this so the LparMap is a normally initialized structure, without
fixed address. This allows us to use macros to compute some of the values
in the structure, which wasn't previously possible because the assembler
always uses signed-% which gets the wrong answers for the computations in
question.
Unfortunately, a gcc bug means that doing this requires another structure
(hvReleaseData) to be initialized in asm instead of C, but on the whole the
result is cleaner than before.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc64/kernel/head.S')
-rw-r--r-- | arch/ppc64/kernel/head.S | 33 |
1 files changed, 3 insertions, 30 deletions
diff --git a/arch/ppc64/kernel/head.S b/arch/ppc64/kernel/head.S index 3f447712e3f..74fc3bc6860 100644 --- a/arch/ppc64/kernel/head.S +++ b/arch/ppc64/kernel/head.S | |||
@@ -522,36 +522,9 @@ __end_interrupts: | |||
522 | #ifdef CONFIG_PPC_ISERIES | 522 | #ifdef CONFIG_PPC_ISERIES |
523 | .globl naca | 523 | .globl naca |
524 | naca: | 524 | naca: |
525 | .llong itVpdAreas | 525 | .llong itVpdAreas |
526 | 526 | .llong 0 /* xRamDisk */ | |
527 | /* | 527 | .llong 0 /* xRamDiskSize */ |
528 | * The iSeries LPAR map is at this fixed address | ||
529 | * so that the HvReleaseData structure can address | ||
530 | * it with a 32-bit offset. | ||
531 | * | ||
532 | * The VSID values below are dependent on the | ||
533 | * VSID generation algorithm. See include/asm/mmu_context.h. | ||
534 | */ | ||
535 | |||
536 | . = 0x4800 | ||
537 | |||
538 | .llong 2 /* # ESIDs to be mapped by hypervisor */ | ||
539 | .llong 1 /* # memory ranges to be mapped by hypervisor */ | ||
540 | .llong STAB0_PAGE /* Page # of segment table within load area */ | ||
541 | .llong 0 /* Reserved */ | ||
542 | .llong 0 /* Reserved */ | ||
543 | .llong 0 /* Reserved */ | ||
544 | .llong 0 /* Reserved */ | ||
545 | .llong 0 /* Reserved */ | ||
546 | .llong (KERNELBASE>>SID_SHIFT) | ||
547 | .llong 0x408f92c94 /* KERNELBASE VSID */ | ||
548 | /* We have to list the bolted VMALLOC segment here, too, so that it | ||
549 | * will be restored on shared processor switch */ | ||
550 | .llong (VMALLOCBASE>>SID_SHIFT) | ||
551 | .llong 0xf09b89af5 /* VMALLOCBASE VSID */ | ||
552 | .llong 8192 /* # pages to map (32 MB) */ | ||
553 | .llong 0 /* Offset from start of loadarea to start of map */ | ||
554 | .llong 0x408f92c940000 /* VPN of first page to map */ | ||
555 | 528 | ||
556 | . = 0x6100 | 529 | . = 0x6100 |
557 | 530 | ||