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authorVitaly Bordug <vbordug@ru.mvista.com>2006-09-21 14:38:05 -0400
committerVitaly Bordug <vbordug@ru.mvista.com>2006-09-21 14:38:05 -0400
commitd3465c921f79cfef0a4a8ceeeef9a3721bbbb57d (patch)
tree73d602a02efd3f358990dcfa9231131e69318d3b /arch/powerpc/platforms
parentfc8e50e349aa722d9f97ed9ba30e324ede8fa408 (diff)
POWERPC: overhaul with cpm2_map mechanism
Incorporating the new way of cpm2 immr access, introduced in the previous patch, into CPM2 peripheral devices (fs_enet and cpm_uart). Both ppc and powerpc approved working( real actions taken in powerpc only, ppc just has a wrapper to keep init stuff consistent). Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Diffstat (limited to 'arch/powerpc/platforms')
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_ads.c109
1 files changed, 60 insertions, 49 deletions
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index 7ebfe74bde4..28070e7ae50 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -33,6 +33,7 @@
33#include "mpc85xx.h" 33#include "mpc85xx.h"
34 34
35#ifdef CONFIG_CPM2 35#ifdef CONFIG_CPM2
36#include <linux/fs_enet_pd.h>
36#include <asm/cpm2.h> 37#include <asm/cpm2.h>
37#include <sysdev/cpm2_pic.h> 38#include <sysdev/cpm2_pic.h>
38#include <asm/fs_pd.h> 39#include <asm/fs_pd.h>
@@ -146,70 +147,81 @@ void __init mpc85xx_ads_pic_init(void)
146 * Setup the architecture 147 * Setup the architecture
147 */ 148 */
148#ifdef CONFIG_CPM2 149#ifdef CONFIG_CPM2
149static void init_fcc_ioports(void) 150void init_fcc_ioports(struct fs_platform_info *fpi)
150{ 151{
151 struct immap *immap; 152 struct io_port *io = cpm2_map(im_ioport);
152 struct io_port *io; 153 int fcc_no = fs_get_fcc_index(fpi->fs_no);
154 int target;
153 u32 tempval; 155 u32 tempval;
154 156
155 immap = cpm2_immr; 157 switch(fcc_no) {
156 158 case 1:
157 io = &immap->im_ioport; 159 tempval = in_be32(&io->iop_pdirb);
158 /* FCC2/3 are on the ports B/C. */ 160 tempval &= ~PB2_DIRB0;
159 tempval = in_be32(&io->iop_pdirb); 161 tempval |= PB2_DIRB1;
160 tempval &= ~PB2_DIRB0; 162 out_be32(&io->iop_pdirb, tempval);
161 tempval |= PB2_DIRB1; 163
162 out_be32(&io->iop_pdirb, tempval); 164 tempval = in_be32(&io->iop_psorb);
163 165 tempval &= ~PB2_PSORB0;
164 tempval = in_be32(&io->iop_psorb); 166 tempval |= PB2_PSORB1;
165 tempval &= ~PB2_PSORB0; 167 out_be32(&io->iop_psorb, tempval);
166 tempval |= PB2_PSORB1; 168
167 out_be32(&io->iop_psorb, tempval); 169 tempval = in_be32(&io->iop_pparb);
168 170 tempval |= (PB2_DIRB0 | PB2_DIRB1);
169 tempval = in_be32(&io->iop_pparb); 171 out_be32(&io->iop_pparb, tempval);
170 tempval |= (PB2_DIRB0 | PB2_DIRB1); 172
171 out_be32(&io->iop_pparb, tempval); 173 target = CPM_CLK_FCC2;
172 174 break;
173 tempval = in_be32(&io->iop_pdirb); 175 case 2:
174 tempval &= ~PB3_DIRB0; 176 tempval = in_be32(&io->iop_pdirb);
175 tempval |= PB3_DIRB1; 177 tempval &= ~PB3_DIRB0;
176 out_be32(&io->iop_pdirb, tempval); 178 tempval |= PB3_DIRB1;
177 179 out_be32(&io->iop_pdirb, tempval);
178 tempval = in_be32(&io->iop_psorb); 180
179 tempval &= ~PB3_PSORB0; 181 tempval = in_be32(&io->iop_psorb);
180 tempval |= PB3_PSORB1; 182 tempval &= ~PB3_PSORB0;
181 out_be32(&io->iop_psorb, tempval); 183 tempval |= PB3_PSORB1;
182 184 out_be32(&io->iop_psorb, tempval);
183 tempval = in_be32(&io->iop_pparb); 185
184 tempval |= (PB3_DIRB0 | PB3_DIRB1); 186 tempval = in_be32(&io->iop_pparb);
185 out_be32(&io->iop_pparb, tempval); 187 tempval |= (PB3_DIRB0 | PB3_DIRB1);
186 188 out_be32(&io->iop_pparb, tempval);
187 tempval = in_be32(&io->iop_pdirc); 189
188 tempval |= PC3_DIRC1; 190 tempval = in_be32(&io->iop_pdirc);
189 out_be32(&io->iop_pdirc, tempval); 191 tempval |= PC3_DIRC1;
190 192 out_be32(&io->iop_pdirc, tempval);
191 tempval = in_be32(&io->iop_pparc); 193
192 tempval |= PC3_DIRC1; 194 tempval = in_be32(&io->iop_pparc);
193 out_be32(&io->iop_pparc, tempval); 195 tempval |= PC3_DIRC1;
196 out_be32(&io->iop_pparc, tempval);
197
198 target = CPM_CLK_FCC3;
199 break;
200 default:
201 printk(KERN_ERR "init_fcc_ioports: invalid FCC number\n");
202 return;
203 }
194 204
195 /* Port C has clocks...... */ 205 /* Port C has clocks...... */
196 tempval = in_be32(&io->iop_psorc); 206 tempval = in_be32(&io->iop_psorc);
197 tempval &= ~(CLK_TRX); 207 tempval &= ~(PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8));
198 out_be32(&io->iop_psorc, tempval); 208 out_be32(&io->iop_psorc, tempval);
199 209
200 tempval = in_be32(&io->iop_pdirc); 210 tempval = in_be32(&io->iop_pdirc);
201 tempval &= ~(CLK_TRX); 211 tempval &= ~(PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8));
202 out_be32(&io->iop_pdirc, tempval); 212 out_be32(&io->iop_pdirc, tempval);
203 tempval = in_be32(&io->iop_pparc); 213 tempval = in_be32(&io->iop_pparc);
204 tempval |= (CLK_TRX); 214 tempval |= (PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8));
205 out_be32(&io->iop_pparc, tempval); 215 out_be32(&io->iop_pparc, tempval);
206 216
217 cpm2_unmap(io);
218
207 /* Configure Serial Interface clock routing. 219 /* Configure Serial Interface clock routing.
208 * First, clear all FCC bits to zero, 220 * First, clear FCC bits to zero,
209 * then set the ones we want. 221 * then set the ones we want.
210 */ 222 */
211 immap->im_cpmux.cmx_fcr &= ~(CPMUX_CLK_MASK); 223 cpm2_clk_setup(target, fpi->clk_rx, CPM_CLK_RX);
212 immap->im_cpmux.cmx_fcr |= CPMUX_CLK_ROUTE; 224 cpm2_clk_setup(target, fpi->clk_tx, CPM_CLK_TX);
213} 225}
214#endif 226#endif
215 227
@@ -237,7 +249,6 @@ static void __init mpc85xx_ads_setup_arch(void)
237 249
238#ifdef CONFIG_CPM2 250#ifdef CONFIG_CPM2
239 cpm2_reset(); 251 cpm2_reset();
240 init_fcc_ioports();
241#endif 252#endif
242 253
243#ifdef CONFIG_PCI 254#ifdef CONFIG_PCI