[POWERPC] Fix kernel build errors for mpc8272ads and mpc8560ads

Recent update of asm-powerpc/io.h caused cpm-related stuff to break in the
current kernel. Current patch fixes it, as well as other inconsistencies
expressed, that do not permit targets from working properly:

- Updated dts with a chosen node with interrupt controller,
- fixed messed device IDs among CPM2 SoC devices,
- corrected odd header name and fixed type in defines,
- Added 82xx subdir to the powerpc/platforms Makefile, missed during
  initial commit,
- new solely-powerpc header file for 8260 family (was using one from
  arch/ppc, this one cleaned up from the extra stuff), in fact for now
  a placeholder to get the board-specific includes for stuff not yet
  capable to live with devicetree peeks only
- Fixed couple of misprints in reference mpc8272 dts.

Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>

1 files changed, 3 insertions, 2 deletions

diff --git a/arch/powerpc/platforms/82xx/pq2ads.h b/arch/powerpc/platforms/82xx/pq2ads.h
index fb2f92bcd77..5b5cca6c8c8 100644
--- a/arch/powerpc/platforms/82xx/pq2ads.h
+++ b/arch/powerpc/platforms/82xx/pq2ads.h
@@ -22,6 +22,7 @@
 #ifndef __MACH_ADS8260_DEFS
 #define __MACH_ADS8260_DEFS
 
+#include <linux/seq_file.h>
 #include <asm/ppcboot.h>
 
 /* For our show_cpuinfo hooks. */
@@ -46,12 +47,12 @@
 #define BCSR1_RS232_EN1         ((uint)0x02000000)      /* 0 ==enable */
 #define BCSR1_RS232_EN2         ((uint)0x01000000)      /* 0 ==enable */
 #define BCSR3_FETHIEN2          ((uint)0x10000000)      /* 0 == enable*/
-#define BCSR3_FETH2_RS          ((uint)0x80000000)      /* 0 == reset */
+#define BCSR3_FETH2_RST         ((uint)0x80000000)      /* 0 == reset */
 
 /* cpm serial driver works with constants below */
 
 #define SIU_INT_SMC1            ((uint)0x04+CPM_IRQ_OFFSET)
-#define SIU_INT_SMC2i           ((uint)0x05+CPM_IRQ_OFFSET)
+#define SIU_INT_SMC2            ((uint)0x05+CPM_IRQ_OFFSET)
 #define SIU_INT_SCC1            ((uint)0x28+CPM_IRQ_OFFSET)
 #define SIU_INT_SCC2            ((uint)0x29+CPM_IRQ_OFFSET)
 #define SIU_INT_SCC3            ((uint)0x2a+CPM_IRQ_OFFSET)