diff options
author | Jiri Kosina <jkosina@suse.cz> | 2011-02-15 04:24:31 -0500 |
---|---|---|
committer | Jiri Kosina <jkosina@suse.cz> | 2011-02-15 04:24:31 -0500 |
commit | 0a9d59a2461477bd9ed143c01af9df3f8f00fa81 (patch) | |
tree | df997d1cfb0786427a0df1fbd6f0640fa4248cf4 /arch/powerpc/kernel | |
parent | a23ce6da9677d245aa0aadc99f4197030350ab54 (diff) | |
parent | 795abaf1e4e188c4171e3cd3dbb11a9fcacaf505 (diff) |
Merge branch 'master' into for-next
Diffstat (limited to 'arch/powerpc/kernel')
-rw-r--r-- | arch/powerpc/kernel/cpu_setup_6xx.S | 40 | ||||
-rw-r--r-- | arch/powerpc/kernel/cpu_setup_fsl_booke.S | 6 | ||||
-rw-r--r-- | arch/powerpc/kernel/cputable.c | 27 | ||||
-rw-r--r-- | arch/powerpc/kernel/crash.c | 72 | ||||
-rw-r--r-- | arch/powerpc/kernel/entry_32.S | 11 | ||||
-rw-r--r-- | arch/powerpc/kernel/machine_kexec.c | 19 | ||||
-rw-r--r-- | arch/powerpc/kernel/perf_event.c | 1 | ||||
-rw-r--r-- | arch/powerpc/kernel/perf_event_fsl_emb.c | 1 | ||||
-rw-r--r-- | arch/powerpc/kernel/process.c | 2 | ||||
-rw-r--r-- | arch/powerpc/kernel/prom.c | 4 | ||||
-rw-r--r-- | arch/powerpc/kernel/rtas_flash.c | 53 | ||||
-rw-r--r-- | arch/powerpc/kernel/rtasd.c | 2 | ||||
-rw-r--r-- | arch/powerpc/kernel/time.c | 25 | ||||
-rw-r--r-- | arch/powerpc/kernel/traps.c | 12 |
14 files changed, 83 insertions, 192 deletions
diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S index 55cba4a8a95..f8cd9fba4d3 100644 --- a/arch/powerpc/kernel/cpu_setup_6xx.S +++ b/arch/powerpc/kernel/cpu_setup_6xx.S | |||
@@ -18,7 +18,7 @@ | |||
18 | #include <asm/mmu.h> | 18 | #include <asm/mmu.h> |
19 | 19 | ||
20 | _GLOBAL(__setup_cpu_603) | 20 | _GLOBAL(__setup_cpu_603) |
21 | mflr r4 | 21 | mflr r5 |
22 | BEGIN_MMU_FTR_SECTION | 22 | BEGIN_MMU_FTR_SECTION |
23 | li r10,0 | 23 | li r10,0 |
24 | mtspr SPRN_SPRG_603_LRU,r10 /* init SW LRU tracking */ | 24 | mtspr SPRN_SPRG_603_LRU,r10 /* init SW LRU tracking */ |
@@ -27,60 +27,60 @@ BEGIN_FTR_SECTION | |||
27 | bl __init_fpu_registers | 27 | bl __init_fpu_registers |
28 | END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE) | 28 | END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE) |
29 | bl setup_common_caches | 29 | bl setup_common_caches |
30 | mtlr r4 | 30 | mtlr r5 |
31 | blr | 31 | blr |
32 | _GLOBAL(__setup_cpu_604) | 32 | _GLOBAL(__setup_cpu_604) |
33 | mflr r4 | 33 | mflr r5 |
34 | bl setup_common_caches | 34 | bl setup_common_caches |
35 | bl setup_604_hid0 | 35 | bl setup_604_hid0 |
36 | mtlr r4 | 36 | mtlr r5 |
37 | blr | 37 | blr |
38 | _GLOBAL(__setup_cpu_750) | 38 | _GLOBAL(__setup_cpu_750) |
39 | mflr r4 | 39 | mflr r5 |
40 | bl __init_fpu_registers | 40 | bl __init_fpu_registers |
41 | bl setup_common_caches | 41 | bl setup_common_caches |
42 | bl setup_750_7400_hid0 | 42 | bl setup_750_7400_hid0 |
43 | mtlr r4 | 43 | mtlr r5 |
44 | blr | 44 | blr |
45 | _GLOBAL(__setup_cpu_750cx) | 45 | _GLOBAL(__setup_cpu_750cx) |
46 | mflr r4 | 46 | mflr r5 |
47 | bl __init_fpu_registers | 47 | bl __init_fpu_registers |
48 | bl setup_common_caches | 48 | bl setup_common_caches |
49 | bl setup_750_7400_hid0 | 49 | bl setup_750_7400_hid0 |
50 | bl setup_750cx | 50 | bl setup_750cx |
51 | mtlr r4 | 51 | mtlr r5 |
52 | blr | 52 | blr |
53 | _GLOBAL(__setup_cpu_750fx) | 53 | _GLOBAL(__setup_cpu_750fx) |
54 | mflr r4 | 54 | mflr r5 |
55 | bl __init_fpu_registers | 55 | bl __init_fpu_registers |
56 | bl setup_common_caches | 56 | bl setup_common_caches |
57 | bl setup_750_7400_hid0 | 57 | bl setup_750_7400_hid0 |
58 | bl setup_750fx | 58 | bl setup_750fx |
59 | mtlr r4 | 59 | mtlr r5 |
60 | blr | 60 | blr |
61 | _GLOBAL(__setup_cpu_7400) | 61 | _GLOBAL(__setup_cpu_7400) |
62 | mflr r4 | 62 | mflr r5 |
63 | bl __init_fpu_registers | 63 | bl __init_fpu_registers |
64 | bl setup_7400_workarounds | 64 | bl setup_7400_workarounds |
65 | bl setup_common_caches | 65 | bl setup_common_caches |
66 | bl setup_750_7400_hid0 | 66 | bl setup_750_7400_hid0 |
67 | mtlr r4 | 67 | mtlr r5 |
68 | blr | 68 | blr |
69 | _GLOBAL(__setup_cpu_7410) | 69 | _GLOBAL(__setup_cpu_7410) |
70 | mflr r4 | 70 | mflr r5 |
71 | bl __init_fpu_registers | 71 | bl __init_fpu_registers |
72 | bl setup_7410_workarounds | 72 | bl setup_7410_workarounds |
73 | bl setup_common_caches | 73 | bl setup_common_caches |
74 | bl setup_750_7400_hid0 | 74 | bl setup_750_7400_hid0 |
75 | li r3,0 | 75 | li r3,0 |
76 | mtspr SPRN_L2CR2,r3 | 76 | mtspr SPRN_L2CR2,r3 |
77 | mtlr r4 | 77 | mtlr r5 |
78 | blr | 78 | blr |
79 | _GLOBAL(__setup_cpu_745x) | 79 | _GLOBAL(__setup_cpu_745x) |
80 | mflr r4 | 80 | mflr r5 |
81 | bl setup_common_caches | 81 | bl setup_common_caches |
82 | bl setup_745x_specifics | 82 | bl setup_745x_specifics |
83 | mtlr r4 | 83 | mtlr r5 |
84 | blr | 84 | blr |
85 | 85 | ||
86 | /* Enable caches for 603's, 604, 750 & 7400 */ | 86 | /* Enable caches for 603's, 604, 750 & 7400 */ |
@@ -194,10 +194,10 @@ setup_750cx: | |||
194 | cror 4*cr0+eq,4*cr0+eq,4*cr1+eq | 194 | cror 4*cr0+eq,4*cr0+eq,4*cr1+eq |
195 | cror 4*cr0+eq,4*cr0+eq,4*cr2+eq | 195 | cror 4*cr0+eq,4*cr0+eq,4*cr2+eq |
196 | bnelr | 196 | bnelr |
197 | lwz r6,CPU_SPEC_FEATURES(r5) | 197 | lwz r6,CPU_SPEC_FEATURES(r4) |
198 | li r7,CPU_FTR_CAN_NAP | 198 | li r7,CPU_FTR_CAN_NAP |
199 | andc r6,r6,r7 | 199 | andc r6,r6,r7 |
200 | stw r6,CPU_SPEC_FEATURES(r5) | 200 | stw r6,CPU_SPEC_FEATURES(r4) |
201 | blr | 201 | blr |
202 | 202 | ||
203 | /* 750fx specific | 203 | /* 750fx specific |
@@ -225,12 +225,12 @@ BEGIN_FTR_SECTION | |||
225 | andis. r11,r11,L3CR_L3E@h | 225 | andis. r11,r11,L3CR_L3E@h |
226 | beq 1f | 226 | beq 1f |
227 | END_FTR_SECTION_IFSET(CPU_FTR_L3CR) | 227 | END_FTR_SECTION_IFSET(CPU_FTR_L3CR) |
228 | lwz r6,CPU_SPEC_FEATURES(r5) | 228 | lwz r6,CPU_SPEC_FEATURES(r4) |
229 | andi. r0,r6,CPU_FTR_L3_DISABLE_NAP | 229 | andi. r0,r6,CPU_FTR_L3_DISABLE_NAP |
230 | beq 1f | 230 | beq 1f |
231 | li r7,CPU_FTR_CAN_NAP | 231 | li r7,CPU_FTR_CAN_NAP |
232 | andc r6,r6,r7 | 232 | andc r6,r6,r7 |
233 | stw r6,CPU_SPEC_FEATURES(r5) | 233 | stw r6,CPU_SPEC_FEATURES(r4) |
234 | 1: | 234 | 1: |
235 | mfspr r11,SPRN_HID0 | 235 | mfspr r11,SPRN_HID0 |
236 | 236 | ||
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S index 894e64fa481..5c518ad3445 100644 --- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S +++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S | |||
@@ -64,6 +64,12 @@ _GLOBAL(__setup_cpu_e500v2) | |||
64 | bl __e500_icache_setup | 64 | bl __e500_icache_setup |
65 | bl __e500_dcache_setup | 65 | bl __e500_dcache_setup |
66 | bl __setup_e500_ivors | 66 | bl __setup_e500_ivors |
67 | #ifdef CONFIG_RAPIDIO | ||
68 | /* Ensure that RFXE is set */ | ||
69 | mfspr r3,SPRN_HID1 | ||
70 | oris r3,r3,HID1_RFXE@h | ||
71 | mtspr SPRN_HID1,r3 | ||
72 | #endif | ||
67 | mtlr r4 | 73 | mtlr r4 |
68 | blr | 74 | blr |
69 | _GLOBAL(__setup_cpu_e500mc) | 75 | _GLOBAL(__setup_cpu_e500mc) |
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index be5ab18b03b..e8e915ce3d8 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c | |||
@@ -116,7 +116,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
116 | .pmc_type = PPC_PMC_IBM, | 116 | .pmc_type = PPC_PMC_IBM, |
117 | .oprofile_cpu_type = "ppc64/power3", | 117 | .oprofile_cpu_type = "ppc64/power3", |
118 | .oprofile_type = PPC_OPROFILE_RS64, | 118 | .oprofile_type = PPC_OPROFILE_RS64, |
119 | .machine_check = machine_check_generic, | ||
120 | .platform = "power3", | 119 | .platform = "power3", |
121 | }, | 120 | }, |
122 | { /* Power3+ */ | 121 | { /* Power3+ */ |
@@ -132,7 +131,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
132 | .pmc_type = PPC_PMC_IBM, | 131 | .pmc_type = PPC_PMC_IBM, |
133 | .oprofile_cpu_type = "ppc64/power3", | 132 | .oprofile_cpu_type = "ppc64/power3", |
134 | .oprofile_type = PPC_OPROFILE_RS64, | 133 | .oprofile_type = PPC_OPROFILE_RS64, |
135 | .machine_check = machine_check_generic, | ||
136 | .platform = "power3", | 134 | .platform = "power3", |
137 | }, | 135 | }, |
138 | { /* Northstar */ | 136 | { /* Northstar */ |
@@ -148,7 +146,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
148 | .pmc_type = PPC_PMC_IBM, | 146 | .pmc_type = PPC_PMC_IBM, |
149 | .oprofile_cpu_type = "ppc64/rs64", | 147 | .oprofile_cpu_type = "ppc64/rs64", |
150 | .oprofile_type = PPC_OPROFILE_RS64, | 148 | .oprofile_type = PPC_OPROFILE_RS64, |
151 | .machine_check = machine_check_generic, | ||
152 | .platform = "rs64", | 149 | .platform = "rs64", |
153 | }, | 150 | }, |
154 | { /* Pulsar */ | 151 | { /* Pulsar */ |
@@ -164,7 +161,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
164 | .pmc_type = PPC_PMC_IBM, | 161 | .pmc_type = PPC_PMC_IBM, |
165 | .oprofile_cpu_type = "ppc64/rs64", | 162 | .oprofile_cpu_type = "ppc64/rs64", |
166 | .oprofile_type = PPC_OPROFILE_RS64, | 163 | .oprofile_type = PPC_OPROFILE_RS64, |
167 | .machine_check = machine_check_generic, | ||
168 | .platform = "rs64", | 164 | .platform = "rs64", |
169 | }, | 165 | }, |
170 | { /* I-star */ | 166 | { /* I-star */ |
@@ -180,7 +176,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
180 | .pmc_type = PPC_PMC_IBM, | 176 | .pmc_type = PPC_PMC_IBM, |
181 | .oprofile_cpu_type = "ppc64/rs64", | 177 | .oprofile_cpu_type = "ppc64/rs64", |
182 | .oprofile_type = PPC_OPROFILE_RS64, | 178 | .oprofile_type = PPC_OPROFILE_RS64, |
183 | .machine_check = machine_check_generic, | ||
184 | .platform = "rs64", | 179 | .platform = "rs64", |
185 | }, | 180 | }, |
186 | { /* S-star */ | 181 | { /* S-star */ |
@@ -196,7 +191,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
196 | .pmc_type = PPC_PMC_IBM, | 191 | .pmc_type = PPC_PMC_IBM, |
197 | .oprofile_cpu_type = "ppc64/rs64", | 192 | .oprofile_cpu_type = "ppc64/rs64", |
198 | .oprofile_type = PPC_OPROFILE_RS64, | 193 | .oprofile_type = PPC_OPROFILE_RS64, |
199 | .machine_check = machine_check_generic, | ||
200 | .platform = "rs64", | 194 | .platform = "rs64", |
201 | }, | 195 | }, |
202 | { /* Power4 */ | 196 | { /* Power4 */ |
@@ -212,7 +206,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
212 | .pmc_type = PPC_PMC_IBM, | 206 | .pmc_type = PPC_PMC_IBM, |
213 | .oprofile_cpu_type = "ppc64/power4", | 207 | .oprofile_cpu_type = "ppc64/power4", |
214 | .oprofile_type = PPC_OPROFILE_POWER4, | 208 | .oprofile_type = PPC_OPROFILE_POWER4, |
215 | .machine_check = machine_check_generic, | ||
216 | .platform = "power4", | 209 | .platform = "power4", |
217 | }, | 210 | }, |
218 | { /* Power4+ */ | 211 | { /* Power4+ */ |
@@ -228,7 +221,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
228 | .pmc_type = PPC_PMC_IBM, | 221 | .pmc_type = PPC_PMC_IBM, |
229 | .oprofile_cpu_type = "ppc64/power4", | 222 | .oprofile_cpu_type = "ppc64/power4", |
230 | .oprofile_type = PPC_OPROFILE_POWER4, | 223 | .oprofile_type = PPC_OPROFILE_POWER4, |
231 | .machine_check = machine_check_generic, | ||
232 | .platform = "power4", | 224 | .platform = "power4", |
233 | }, | 225 | }, |
234 | { /* PPC970 */ | 226 | { /* PPC970 */ |
@@ -247,7 +239,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
247 | .cpu_restore = __restore_cpu_ppc970, | 239 | .cpu_restore = __restore_cpu_ppc970, |
248 | .oprofile_cpu_type = "ppc64/970", | 240 | .oprofile_cpu_type = "ppc64/970", |
249 | .oprofile_type = PPC_OPROFILE_POWER4, | 241 | .oprofile_type = PPC_OPROFILE_POWER4, |
250 | .machine_check = machine_check_generic, | ||
251 | .platform = "ppc970", | 242 | .platform = "ppc970", |
252 | }, | 243 | }, |
253 | { /* PPC970FX */ | 244 | { /* PPC970FX */ |
@@ -266,7 +257,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
266 | .cpu_restore = __restore_cpu_ppc970, | 257 | .cpu_restore = __restore_cpu_ppc970, |
267 | .oprofile_cpu_type = "ppc64/970", | 258 | .oprofile_cpu_type = "ppc64/970", |
268 | .oprofile_type = PPC_OPROFILE_POWER4, | 259 | .oprofile_type = PPC_OPROFILE_POWER4, |
269 | .machine_check = machine_check_generic, | ||
270 | .platform = "ppc970", | 260 | .platform = "ppc970", |
271 | }, | 261 | }, |
272 | { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ | 262 | { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ |
@@ -285,7 +275,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
285 | .cpu_restore = __restore_cpu_ppc970, | 275 | .cpu_restore = __restore_cpu_ppc970, |
286 | .oprofile_cpu_type = "ppc64/970MP", | 276 | .oprofile_cpu_type = "ppc64/970MP", |
287 | .oprofile_type = PPC_OPROFILE_POWER4, | 277 | .oprofile_type = PPC_OPROFILE_POWER4, |
288 | .machine_check = machine_check_generic, | ||
289 | .platform = "ppc970", | 278 | .platform = "ppc970", |
290 | }, | 279 | }, |
291 | { /* PPC970MP */ | 280 | { /* PPC970MP */ |
@@ -304,7 +293,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
304 | .cpu_restore = __restore_cpu_ppc970, | 293 | .cpu_restore = __restore_cpu_ppc970, |
305 | .oprofile_cpu_type = "ppc64/970MP", | 294 | .oprofile_cpu_type = "ppc64/970MP", |
306 | .oprofile_type = PPC_OPROFILE_POWER4, | 295 | .oprofile_type = PPC_OPROFILE_POWER4, |
307 | .machine_check = machine_check_generic, | ||
308 | .platform = "ppc970", | 296 | .platform = "ppc970", |
309 | }, | 297 | }, |
310 | { /* PPC970GX */ | 298 | { /* PPC970GX */ |
@@ -322,7 +310,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
322 | .cpu_setup = __setup_cpu_ppc970, | 310 | .cpu_setup = __setup_cpu_ppc970, |
323 | .oprofile_cpu_type = "ppc64/970", | 311 | .oprofile_cpu_type = "ppc64/970", |
324 | .oprofile_type = PPC_OPROFILE_POWER4, | 312 | .oprofile_type = PPC_OPROFILE_POWER4, |
325 | .machine_check = machine_check_generic, | ||
326 | .platform = "ppc970", | 313 | .platform = "ppc970", |
327 | }, | 314 | }, |
328 | { /* Power5 GR */ | 315 | { /* Power5 GR */ |
@@ -343,7 +330,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
343 | */ | 330 | */ |
344 | .oprofile_mmcra_sihv = MMCRA_SIHV, | 331 | .oprofile_mmcra_sihv = MMCRA_SIHV, |
345 | .oprofile_mmcra_sipr = MMCRA_SIPR, | 332 | .oprofile_mmcra_sipr = MMCRA_SIPR, |
346 | .machine_check = machine_check_generic, | ||
347 | .platform = "power5", | 333 | .platform = "power5", |
348 | }, | 334 | }, |
349 | { /* Power5++ */ | 335 | { /* Power5++ */ |
@@ -360,7 +346,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
360 | .oprofile_type = PPC_OPROFILE_POWER4, | 346 | .oprofile_type = PPC_OPROFILE_POWER4, |
361 | .oprofile_mmcra_sihv = MMCRA_SIHV, | 347 | .oprofile_mmcra_sihv = MMCRA_SIHV, |
362 | .oprofile_mmcra_sipr = MMCRA_SIPR, | 348 | .oprofile_mmcra_sipr = MMCRA_SIPR, |
363 | .machine_check = machine_check_generic, | ||
364 | .platform = "power5+", | 349 | .platform = "power5+", |
365 | }, | 350 | }, |
366 | { /* Power5 GS */ | 351 | { /* Power5 GS */ |
@@ -378,7 +363,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
378 | .oprofile_type = PPC_OPROFILE_POWER4, | 363 | .oprofile_type = PPC_OPROFILE_POWER4, |
379 | .oprofile_mmcra_sihv = MMCRA_SIHV, | 364 | .oprofile_mmcra_sihv = MMCRA_SIHV, |
380 | .oprofile_mmcra_sipr = MMCRA_SIPR, | 365 | .oprofile_mmcra_sipr = MMCRA_SIPR, |
381 | .machine_check = machine_check_generic, | ||
382 | .platform = "power5+", | 366 | .platform = "power5+", |
383 | }, | 367 | }, |
384 | { /* POWER6 in P5+ mode; 2.04-compliant processor */ | 368 | { /* POWER6 in P5+ mode; 2.04-compliant processor */ |
@@ -390,7 +374,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
390 | .mmu_features = MMU_FTR_HPTE_TABLE, | 374 | .mmu_features = MMU_FTR_HPTE_TABLE, |
391 | .icache_bsize = 128, | 375 | .icache_bsize = 128, |
392 | .dcache_bsize = 128, | 376 | .dcache_bsize = 128, |
393 | .machine_check = machine_check_generic, | ||
394 | .oprofile_cpu_type = "ppc64/ibm-compat-v1", | 377 | .oprofile_cpu_type = "ppc64/ibm-compat-v1", |
395 | .oprofile_type = PPC_OPROFILE_POWER4, | 378 | .oprofile_type = PPC_OPROFILE_POWER4, |
396 | .platform = "power5+", | 379 | .platform = "power5+", |
@@ -413,7 +396,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
413 | .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, | 396 | .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, |
414 | .oprofile_mmcra_clear = POWER6_MMCRA_THRM | | 397 | .oprofile_mmcra_clear = POWER6_MMCRA_THRM | |
415 | POWER6_MMCRA_OTHER, | 398 | POWER6_MMCRA_OTHER, |
416 | .machine_check = machine_check_generic, | ||
417 | .platform = "power6x", | 399 | .platform = "power6x", |
418 | }, | 400 | }, |
419 | { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ | 401 | { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ |
@@ -425,7 +407,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
425 | .mmu_features = MMU_FTR_HPTE_TABLE, | 407 | .mmu_features = MMU_FTR_HPTE_TABLE, |
426 | .icache_bsize = 128, | 408 | .icache_bsize = 128, |
427 | .dcache_bsize = 128, | 409 | .dcache_bsize = 128, |
428 | .machine_check = machine_check_generic, | ||
429 | .oprofile_cpu_type = "ppc64/ibm-compat-v1", | 410 | .oprofile_cpu_type = "ppc64/ibm-compat-v1", |
430 | .oprofile_type = PPC_OPROFILE_POWER4, | 411 | .oprofile_type = PPC_OPROFILE_POWER4, |
431 | .platform = "power6", | 412 | .platform = "power6", |
@@ -440,7 +421,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
440 | MMU_FTR_TLBIE_206, | 421 | MMU_FTR_TLBIE_206, |
441 | .icache_bsize = 128, | 422 | .icache_bsize = 128, |
442 | .dcache_bsize = 128, | 423 | .dcache_bsize = 128, |
443 | .machine_check = machine_check_generic, | ||
444 | .oprofile_type = PPC_OPROFILE_POWER4, | 424 | .oprofile_type = PPC_OPROFILE_POWER4, |
445 | .oprofile_cpu_type = "ppc64/ibm-compat-v1", | 425 | .oprofile_cpu_type = "ppc64/ibm-compat-v1", |
446 | .platform = "power7", | 426 | .platform = "power7", |
@@ -492,7 +472,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
492 | .pmc_type = PPC_PMC_IBM, | 472 | .pmc_type = PPC_PMC_IBM, |
493 | .oprofile_cpu_type = "ppc64/cell-be", | 473 | .oprofile_cpu_type = "ppc64/cell-be", |
494 | .oprofile_type = PPC_OPROFILE_CELL, | 474 | .oprofile_type = PPC_OPROFILE_CELL, |
495 | .machine_check = machine_check_generic, | ||
496 | .platform = "ppc-cell-be", | 475 | .platform = "ppc-cell-be", |
497 | }, | 476 | }, |
498 | { /* PA Semi PA6T */ | 477 | { /* PA Semi PA6T */ |
@@ -510,7 +489,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
510 | .cpu_restore = __restore_cpu_pa6t, | 489 | .cpu_restore = __restore_cpu_pa6t, |
511 | .oprofile_cpu_type = "ppc64/pa6t", | 490 | .oprofile_cpu_type = "ppc64/pa6t", |
512 | .oprofile_type = PPC_OPROFILE_PA6T, | 491 | .oprofile_type = PPC_OPROFILE_PA6T, |
513 | .machine_check = machine_check_generic, | ||
514 | .platform = "pa6t", | 492 | .platform = "pa6t", |
515 | }, | 493 | }, |
516 | { /* default match */ | 494 | { /* default match */ |
@@ -524,7 +502,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
524 | .dcache_bsize = 128, | 502 | .dcache_bsize = 128, |
525 | .num_pmcs = 6, | 503 | .num_pmcs = 6, |
526 | .pmc_type = PPC_PMC_IBM, | 504 | .pmc_type = PPC_PMC_IBM, |
527 | .machine_check = machine_check_generic, | ||
528 | .platform = "power4", | 505 | .platform = "power4", |
529 | } | 506 | } |
530 | #endif /* CONFIG_PPC_BOOK3S_64 */ | 507 | #endif /* CONFIG_PPC_BOOK3S_64 */ |
@@ -2099,8 +2076,8 @@ static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s) | |||
2099 | * pointer on ppc64 and booke as we are running at 0 in real mode | 2076 | * pointer on ppc64 and booke as we are running at 0 in real mode |
2100 | * on ppc64 and reloc_offset is always 0 on booke. | 2077 | * on ppc64 and reloc_offset is always 0 on booke. |
2101 | */ | 2078 | */ |
2102 | if (s->cpu_setup) { | 2079 | if (t->cpu_setup) { |
2103 | s->cpu_setup(offset, s); | 2080 | t->cpu_setup(offset, t); |
2104 | } | 2081 | } |
2105 | #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ | 2082 | #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ |
2106 | } | 2083 | } |
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c index 832c8c4db25..3d569e2aff1 100644 --- a/arch/powerpc/kernel/crash.c +++ b/arch/powerpc/kernel/crash.c | |||
@@ -48,7 +48,7 @@ int crashing_cpu = -1; | |||
48 | static cpumask_t cpus_in_crash = CPU_MASK_NONE; | 48 | static cpumask_t cpus_in_crash = CPU_MASK_NONE; |
49 | cpumask_t cpus_in_sr = CPU_MASK_NONE; | 49 | cpumask_t cpus_in_sr = CPU_MASK_NONE; |
50 | 50 | ||
51 | #define CRASH_HANDLER_MAX 2 | 51 | #define CRASH_HANDLER_MAX 3 |
52 | /* NULL terminated list of shutdown handles */ | 52 | /* NULL terminated list of shutdown handles */ |
53 | static crash_shutdown_t crash_shutdown_handles[CRASH_HANDLER_MAX+1]; | 53 | static crash_shutdown_t crash_shutdown_handles[CRASH_HANDLER_MAX+1]; |
54 | static DEFINE_SPINLOCK(crash_handlers_lock); | 54 | static DEFINE_SPINLOCK(crash_handlers_lock); |
@@ -125,7 +125,7 @@ static void crash_kexec_prepare_cpus(int cpu) | |||
125 | smp_wmb(); | 125 | smp_wmb(); |
126 | 126 | ||
127 | /* | 127 | /* |
128 | * FIXME: Until we will have the way to stop other CPUSs reliabally, | 128 | * FIXME: Until we will have the way to stop other CPUs reliably, |
129 | * the crash CPU will send an IPI and wait for other CPUs to | 129 | * the crash CPU will send an IPI and wait for other CPUs to |
130 | * respond. | 130 | * respond. |
131 | * Delay of at least 10 seconds. | 131 | * Delay of at least 10 seconds. |
@@ -254,72 +254,6 @@ void crash_kexec_secondary(struct pt_regs *regs) | |||
254 | cpus_in_sr = CPU_MASK_NONE; | 254 | cpus_in_sr = CPU_MASK_NONE; |
255 | } | 255 | } |
256 | #endif | 256 | #endif |
257 | #ifdef CONFIG_SPU_BASE | ||
258 | |||
259 | #include <asm/spu.h> | ||
260 | #include <asm/spu_priv1.h> | ||
261 | |||
262 | struct crash_spu_info { | ||
263 | struct spu *spu; | ||
264 | u32 saved_spu_runcntl_RW; | ||
265 | u32 saved_spu_status_R; | ||
266 | u32 saved_spu_npc_RW; | ||
267 | u64 saved_mfc_sr1_RW; | ||
268 | u64 saved_mfc_dar; | ||
269 | u64 saved_mfc_dsisr; | ||
270 | }; | ||
271 | |||
272 | #define CRASH_NUM_SPUS 16 /* Enough for current hardware */ | ||
273 | static struct crash_spu_info crash_spu_info[CRASH_NUM_SPUS]; | ||
274 | |||
275 | static void crash_kexec_stop_spus(void) | ||
276 | { | ||
277 | struct spu *spu; | ||
278 | int i; | ||
279 | u64 tmp; | ||
280 | |||
281 | for (i = 0; i < CRASH_NUM_SPUS; i++) { | ||
282 | if (!crash_spu_info[i].spu) | ||
283 | continue; | ||
284 | |||
285 | spu = crash_spu_info[i].spu; | ||
286 | |||
287 | crash_spu_info[i].saved_spu_runcntl_RW = | ||
288 | in_be32(&spu->problem->spu_runcntl_RW); | ||
289 | crash_spu_info[i].saved_spu_status_R = | ||
290 | in_be32(&spu->problem->spu_status_R); | ||
291 | crash_spu_info[i].saved_spu_npc_RW = | ||
292 | in_be32(&spu->problem->spu_npc_RW); | ||
293 | |||
294 | crash_spu_info[i].saved_mfc_dar = spu_mfc_dar_get(spu); | ||
295 | crash_spu_info[i].saved_mfc_dsisr = spu_mfc_dsisr_get(spu); | ||
296 | tmp = spu_mfc_sr1_get(spu); | ||
297 | crash_spu_info[i].saved_mfc_sr1_RW = tmp; | ||
298 | |||
299 | tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; | ||
300 | spu_mfc_sr1_set(spu, tmp); | ||
301 | |||
302 | __delay(200); | ||
303 | } | ||
304 | } | ||
305 | |||
306 | void crash_register_spus(struct list_head *list) | ||
307 | { | ||
308 | struct spu *spu; | ||
309 | |||
310 | list_for_each_entry(spu, list, full_list) { | ||
311 | if (WARN_ON(spu->number >= CRASH_NUM_SPUS)) | ||
312 | continue; | ||
313 | |||
314 | crash_spu_info[spu->number].spu = spu; | ||
315 | } | ||
316 | } | ||
317 | |||
318 | #else | ||
319 | static inline void crash_kexec_stop_spus(void) | ||
320 | { | ||
321 | } | ||
322 | #endif /* CONFIG_SPU_BASE */ | ||
323 | 257 | ||
324 | /* | 258 | /* |
325 | * Register a function to be called on shutdown. Only use this if you | 259 | * Register a function to be called on shutdown. Only use this if you |
@@ -439,8 +373,6 @@ void default_machine_crash_shutdown(struct pt_regs *regs) | |||
439 | crash_shutdown_cpu = -1; | 373 | crash_shutdown_cpu = -1; |
440 | __debugger_fault_handler = old_handler; | 374 | __debugger_fault_handler = old_handler; |
441 | 375 | ||
442 | crash_kexec_stop_spus(); | ||
443 | |||
444 | if (ppc_md.kexec_cpu_down) | 376 | if (ppc_md.kexec_cpu_down) |
445 | ppc_md.kexec_cpu_down(1, 0); | 377 | ppc_md.kexec_cpu_down(1, 0); |
446 | } | 378 | } |
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S index c22dc1ec1c9..56212bc0ab0 100644 --- a/arch/powerpc/kernel/entry_32.S +++ b/arch/powerpc/kernel/entry_32.S | |||
@@ -880,7 +880,18 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_TYPE_47x) | |||
880 | */ | 880 | */ |
881 | andi. r10,r9,MSR_EE | 881 | andi. r10,r9,MSR_EE |
882 | beq 1f | 882 | beq 1f |
883 | /* | ||
884 | * Since the ftrace irqsoff latency trace checks CALLER_ADDR1, | ||
885 | * which is the stack frame here, we need to force a stack frame | ||
886 | * in case we came from user space. | ||
887 | */ | ||
888 | stwu r1,-32(r1) | ||
889 | mflr r0 | ||
890 | stw r0,4(r1) | ||
891 | stwu r1,-32(r1) | ||
883 | bl trace_hardirqs_on | 892 | bl trace_hardirqs_on |
893 | lwz r1,0(r1) | ||
894 | lwz r1,0(r1) | ||
884 | lwz r9,_MSR(r1) | 895 | lwz r9,_MSR(r1) |
885 | 1: | 896 | 1: |
886 | #endif /* CONFIG_TRACE_IRQFLAGS */ | 897 | #endif /* CONFIG_TRACE_IRQFLAGS */ |
diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c index df7e20c191c..49a170af814 100644 --- a/arch/powerpc/kernel/machine_kexec.c +++ b/arch/powerpc/kernel/machine_kexec.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/memblock.h> | 15 | #include <linux/memblock.h> |
16 | #include <linux/of.h> | 16 | #include <linux/of.h> |
17 | #include <linux/irq.h> | 17 | #include <linux/irq.h> |
18 | #include <linux/ftrace.h> | ||
18 | 19 | ||
19 | #include <asm/machdep.h> | 20 | #include <asm/machdep.h> |
20 | #include <asm/prom.h> | 21 | #include <asm/prom.h> |
@@ -44,10 +45,7 @@ void machine_kexec_mask_interrupts(void) { | |||
44 | 45 | ||
45 | void machine_crash_shutdown(struct pt_regs *regs) | 46 | void machine_crash_shutdown(struct pt_regs *regs) |
46 | { | 47 | { |
47 | if (ppc_md.machine_crash_shutdown) | 48 | default_machine_crash_shutdown(regs); |
48 | ppc_md.machine_crash_shutdown(regs); | ||
49 | else | ||
50 | default_machine_crash_shutdown(regs); | ||
51 | } | 49 | } |
52 | 50 | ||
53 | /* | 51 | /* |
@@ -65,8 +63,6 @@ int machine_kexec_prepare(struct kimage *image) | |||
65 | 63 | ||
66 | void machine_kexec_cleanup(struct kimage *image) | 64 | void machine_kexec_cleanup(struct kimage *image) |
67 | { | 65 | { |
68 | if (ppc_md.machine_kexec_cleanup) | ||
69 | ppc_md.machine_kexec_cleanup(image); | ||
70 | } | 66 | } |
71 | 67 | ||
72 | void arch_crash_save_vmcoreinfo(void) | 68 | void arch_crash_save_vmcoreinfo(void) |
@@ -87,10 +83,13 @@ void arch_crash_save_vmcoreinfo(void) | |||
87 | */ | 83 | */ |
88 | void machine_kexec(struct kimage *image) | 84 | void machine_kexec(struct kimage *image) |
89 | { | 85 | { |
90 | if (ppc_md.machine_kexec) | 86 | int save_ftrace_enabled; |
91 | ppc_md.machine_kexec(image); | 87 | |
92 | else | 88 | save_ftrace_enabled = __ftrace_enabled_save(); |
93 | default_machine_kexec(image); | 89 | |
90 | default_machine_kexec(image); | ||
91 | |||
92 | __ftrace_enabled_restore(save_ftrace_enabled); | ||
94 | 93 | ||
95 | /* Fall back to normal restart if we're still alive. */ | 94 | /* Fall back to normal restart if we're still alive. */ |
96 | machine_restart(NULL); | 95 | machine_restart(NULL); |
diff --git a/arch/powerpc/kernel/perf_event.c b/arch/powerpc/kernel/perf_event.c index 56748070578..ab6f6beadb5 100644 --- a/arch/powerpc/kernel/perf_event.c +++ b/arch/powerpc/kernel/perf_event.c | |||
@@ -1212,6 +1212,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val, | |||
1212 | if (left <= 0) | 1212 | if (left <= 0) |
1213 | left = period; | 1213 | left = period; |
1214 | record = 1; | 1214 | record = 1; |
1215 | event->hw.last_period = event->hw.sample_period; | ||
1215 | } | 1216 | } |
1216 | if (left < 0x80000000LL) | 1217 | if (left < 0x80000000LL) |
1217 | val = 0x80000000LL - left; | 1218 | val = 0x80000000LL - left; |
diff --git a/arch/powerpc/kernel/perf_event_fsl_emb.c b/arch/powerpc/kernel/perf_event_fsl_emb.c index 4dcf5f831e9..b0dc8f7069c 100644 --- a/arch/powerpc/kernel/perf_event_fsl_emb.c +++ b/arch/powerpc/kernel/perf_event_fsl_emb.c | |||
@@ -596,6 +596,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val, | |||
596 | if (left <= 0) | 596 | if (left <= 0) |
597 | left = period; | 597 | left = period; |
598 | record = 1; | 598 | record = 1; |
599 | event->hw.last_period = event->hw.sample_period; | ||
599 | } | 600 | } |
600 | if (left < 0x80000000LL) | 601 | if (left < 0x80000000LL) |
601 | val = 0x80000000LL - left; | 602 | val = 0x80000000LL - left; |
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index 84906d3fc86..7a1d5cb7693 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c | |||
@@ -631,7 +631,7 @@ void show_regs(struct pt_regs * regs) | |||
631 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS | 631 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS |
632 | printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr); | 632 | printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr); |
633 | #else | 633 | #else |
634 | printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr); | 634 | printk("DAR: "REG", DSISR: %08lx\n", regs->dar, regs->dsisr); |
635 | #endif | 635 | #endif |
636 | printk("TASK = %p[%d] '%s' THREAD: %p", | 636 | printk("TASK = %p[%d] '%s' THREAD: %p", |
637 | current, task_pid_nr(current), current->comm, task_thread_info(current)); | 637 | current, task_pid_nr(current), current->comm, task_thread_info(current)); |
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c index 9e3132db718..7185f0da7dc 100644 --- a/arch/powerpc/kernel/prom.c +++ b/arch/powerpc/kernel/prom.c | |||
@@ -519,9 +519,9 @@ void __init early_init_dt_add_memory_arch(u64 base, u64 size) | |||
519 | memblock_add(base, size); | 519 | memblock_add(base, size); |
520 | } | 520 | } |
521 | 521 | ||
522 | u64 __init early_init_dt_alloc_memory_arch(u64 size, u64 align) | 522 | void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align) |
523 | { | 523 | { |
524 | return memblock_alloc(size, align); | 524 | return __va(memblock_alloc(size, align)); |
525 | } | 525 | } |
526 | 526 | ||
527 | #ifdef CONFIG_BLK_DEV_INITRD | 527 | #ifdef CONFIG_BLK_DEV_INITRD |
diff --git a/arch/powerpc/kernel/rtas_flash.c b/arch/powerpc/kernel/rtas_flash.c index 2b442e6c21e..bf5f5ce3a7b 100644 --- a/arch/powerpc/kernel/rtas_flash.c +++ b/arch/powerpc/kernel/rtas_flash.c | |||
@@ -256,31 +256,16 @@ static ssize_t rtas_flash_read(struct file *file, char __user *buf, | |||
256 | struct proc_dir_entry *dp = PDE(file->f_path.dentry->d_inode); | 256 | struct proc_dir_entry *dp = PDE(file->f_path.dentry->d_inode); |
257 | struct rtas_update_flash_t *uf; | 257 | struct rtas_update_flash_t *uf; |
258 | char msg[RTAS_MSG_MAXLEN]; | 258 | char msg[RTAS_MSG_MAXLEN]; |
259 | int msglen; | ||
260 | 259 | ||
261 | uf = (struct rtas_update_flash_t *) dp->data; | 260 | uf = dp->data; |
262 | 261 | ||
263 | if (!strcmp(dp->name, FIRMWARE_FLASH_NAME)) { | 262 | if (!strcmp(dp->name, FIRMWARE_FLASH_NAME)) { |
264 | get_flash_status_msg(uf->status, msg); | 263 | get_flash_status_msg(uf->status, msg); |
265 | } else { /* FIRMWARE_UPDATE_NAME */ | 264 | } else { /* FIRMWARE_UPDATE_NAME */ |
266 | sprintf(msg, "%d\n", uf->status); | 265 | sprintf(msg, "%d\n", uf->status); |
267 | } | 266 | } |
268 | msglen = strlen(msg); | ||
269 | if (msglen > count) | ||
270 | msglen = count; | ||
271 | |||
272 | if (ppos && *ppos != 0) | ||
273 | return 0; /* be cheap */ | ||
274 | |||
275 | if (!access_ok(VERIFY_WRITE, buf, msglen)) | ||
276 | return -EINVAL; | ||
277 | 267 | ||
278 | if (copy_to_user(buf, msg, msglen)) | 268 | return simple_read_from_buffer(buf, count, ppos, msg, strlen(msg)); |
279 | return -EFAULT; | ||
280 | |||
281 | if (ppos) | ||
282 | *ppos = msglen; | ||
283 | return msglen; | ||
284 | } | 269 | } |
285 | 270 | ||
286 | /* constructor for flash_block_cache */ | 271 | /* constructor for flash_block_cache */ |
@@ -394,26 +379,13 @@ static ssize_t manage_flash_read(struct file *file, char __user *buf, | |||
394 | char msg[RTAS_MSG_MAXLEN]; | 379 | char msg[RTAS_MSG_MAXLEN]; |
395 | int msglen; | 380 | int msglen; |
396 | 381 | ||
397 | args_buf = (struct rtas_manage_flash_t *) dp->data; | 382 | args_buf = dp->data; |
398 | if (args_buf == NULL) | 383 | if (args_buf == NULL) |
399 | return 0; | 384 | return 0; |
400 | 385 | ||
401 | msglen = sprintf(msg, "%d\n", args_buf->status); | 386 | msglen = sprintf(msg, "%d\n", args_buf->status); |
402 | if (msglen > count) | ||
403 | msglen = count; | ||
404 | 387 | ||
405 | if (ppos && *ppos != 0) | 388 | return simple_read_from_buffer(buf, count, ppos, msg, msglen); |
406 | return 0; /* be cheap */ | ||
407 | |||
408 | if (!access_ok(VERIFY_WRITE, buf, msglen)) | ||
409 | return -EINVAL; | ||
410 | |||
411 | if (copy_to_user(buf, msg, msglen)) | ||
412 | return -EFAULT; | ||
413 | |||
414 | if (ppos) | ||
415 | *ppos = msglen; | ||
416 | return msglen; | ||
417 | } | 389 | } |
418 | 390 | ||
419 | static ssize_t manage_flash_write(struct file *file, const char __user *buf, | 391 | static ssize_t manage_flash_write(struct file *file, const char __user *buf, |
@@ -495,24 +467,11 @@ static ssize_t validate_flash_read(struct file *file, char __user *buf, | |||
495 | char msg[RTAS_MSG_MAXLEN]; | 467 | char msg[RTAS_MSG_MAXLEN]; |
496 | int msglen; | 468 | int msglen; |
497 | 469 | ||
498 | args_buf = (struct rtas_validate_flash_t *) dp->data; | 470 | args_buf = dp->data; |
499 | 471 | ||
500 | if (ppos && *ppos != 0) | ||
501 | return 0; /* be cheap */ | ||
502 | |||
503 | msglen = get_validate_flash_msg(args_buf, msg); | 472 | msglen = get_validate_flash_msg(args_buf, msg); |
504 | if (msglen > count) | ||
505 | msglen = count; | ||
506 | |||
507 | if (!access_ok(VERIFY_WRITE, buf, msglen)) | ||
508 | return -EINVAL; | ||
509 | |||
510 | if (copy_to_user(buf, msg, msglen)) | ||
511 | return -EFAULT; | ||
512 | 473 | ||
513 | if (ppos) | 474 | return simple_read_from_buffer(buf, count, ppos, msg, msglen); |
514 | *ppos = msglen; | ||
515 | return msglen; | ||
516 | } | 475 | } |
517 | 476 | ||
518 | static ssize_t validate_flash_write(struct file *file, const char __user *buf, | 477 | static ssize_t validate_flash_write(struct file *file, const char __user *buf, |
diff --git a/arch/powerpc/kernel/rtasd.c b/arch/powerpc/kernel/rtasd.c index 0438f819fe6..049dbecb5db 100644 --- a/arch/powerpc/kernel/rtasd.c +++ b/arch/powerpc/kernel/rtasd.c | |||
@@ -160,7 +160,7 @@ static int log_rtas_len(char * buf) | |||
160 | /* rtas fixed header */ | 160 | /* rtas fixed header */ |
161 | len = 8; | 161 | len = 8; |
162 | err = (struct rtas_error_log *)buf; | 162 | err = (struct rtas_error_log *)buf; |
163 | if (err->extended_log_length) { | 163 | if (err->extended && err->extended_log_length) { |
164 | 164 | ||
165 | /* extended header */ | 165 | /* extended header */ |
166 | len += err->extended_log_length; | 166 | len += err->extended_log_length; |
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c index 09e4dea4a85..09d31dbf43f 100644 --- a/arch/powerpc/kernel/time.c +++ b/arch/powerpc/kernel/time.c | |||
@@ -265,11 +265,26 @@ void accumulate_stolen_time(void) | |||
265 | { | 265 | { |
266 | u64 sst, ust; | 266 | u64 sst, ust; |
267 | 267 | ||
268 | sst = scan_dispatch_log(get_paca()->starttime_user); | 268 | u8 save_soft_enabled = local_paca->soft_enabled; |
269 | ust = scan_dispatch_log(get_paca()->starttime); | 269 | u8 save_hard_enabled = local_paca->hard_enabled; |
270 | get_paca()->system_time -= sst; | 270 | |
271 | get_paca()->user_time -= ust; | 271 | /* We are called early in the exception entry, before |
272 | get_paca()->stolen_time += ust + sst; | 272 | * soft/hard_enabled are sync'ed to the expected state |
273 | * for the exception. We are hard disabled but the PACA | ||
274 | * needs to reflect that so various debug stuff doesn't | ||
275 | * complain | ||
276 | */ | ||
277 | local_paca->soft_enabled = 0; | ||
278 | local_paca->hard_enabled = 0; | ||
279 | |||
280 | sst = scan_dispatch_log(local_paca->starttime_user); | ||
281 | ust = scan_dispatch_log(local_paca->starttime); | ||
282 | local_paca->system_time -= sst; | ||
283 | local_paca->user_time -= ust; | ||
284 | local_paca->stolen_time += ust + sst; | ||
285 | |||
286 | local_paca->soft_enabled = save_soft_enabled; | ||
287 | local_paca->hard_enabled = save_hard_enabled; | ||
273 | } | 288 | } |
274 | 289 | ||
275 | static inline u64 calculate_stolen_time(u64 stop_tb) | 290 | static inline u64 calculate_stolen_time(u64 stop_tb) |
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index 1b2cdc8eec9..bd74fac169b 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c | |||
@@ -626,12 +626,6 @@ void machine_check_exception(struct pt_regs *regs) | |||
626 | if (recover > 0) | 626 | if (recover > 0) |
627 | return; | 627 | return; |
628 | 628 | ||
629 | if (user_mode(regs)) { | ||
630 | regs->msr |= MSR_RI; | ||
631 | _exception(SIGBUS, regs, BUS_ADRERR, regs->nip); | ||
632 | return; | ||
633 | } | ||
634 | |||
635 | #if defined(CONFIG_8xx) && defined(CONFIG_PCI) | 629 | #if defined(CONFIG_8xx) && defined(CONFIG_PCI) |
636 | /* the qspan pci read routines can cause machine checks -- Cort | 630 | /* the qspan pci read routines can cause machine checks -- Cort |
637 | * | 631 | * |
@@ -643,16 +637,12 @@ void machine_check_exception(struct pt_regs *regs) | |||
643 | return; | 637 | return; |
644 | #endif | 638 | #endif |
645 | 639 | ||
646 | if (debugger_fault_handler(regs)) { | 640 | if (debugger_fault_handler(regs)) |
647 | regs->msr |= MSR_RI; | ||
648 | return; | 641 | return; |
649 | } | ||
650 | 642 | ||
651 | if (check_io_access(regs)) | 643 | if (check_io_access(regs)) |
652 | return; | 644 | return; |
653 | 645 | ||
654 | if (debugger_fault_handler(regs)) | ||
655 | return; | ||
656 | die("Machine check", regs, SIGBUS); | 646 | die("Machine check", regs, SIGBUS); |
657 | 647 | ||
658 | /* Must die if the interrupt is not recoverable */ | 648 | /* Must die if the interrupt is not recoverable */ |