diff options
author | Anton Blanchard <anton@samba.org> | 2010-02-09 20:04:06 -0500 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2010-02-16 22:03:15 -0500 |
commit | f10e2e5b4b4c9937de596f96ffe028be3a565598 (patch) | |
tree | 89808d05159ac5bd4aeea53b52dc0ddb3373fe65 /arch/powerpc/include/asm/bitops.h | |
parent | 66d99b883419b8df6d0a24ca957da7ab4831cf6e (diff) |
powerpc: Rename LWSYNC_ON_SMP to PPC_RELEASE_BARRIER, ISYNC_ON_SMP to PPC_ACQUIRE_BARRIER
For performance reasons we are about to change ISYNC_ON_SMP to sometimes be
lwsync. Now that the macro name doesn't make sense, change it and LWSYNC_ON_SMP
to better explain what the barriers are doing.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/bitops.h')
-rw-r--r-- | arch/powerpc/include/asm/bitops.h | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/arch/powerpc/include/asm/bitops.h b/arch/powerpc/include/asm/bitops.h index 3c7c37bd92e..30964ae2d09 100644 --- a/arch/powerpc/include/asm/bitops.h +++ b/arch/powerpc/include/asm/bitops.h | |||
@@ -78,7 +78,7 @@ static __inline__ void fn(unsigned long mask, \ | |||
78 | 78 | ||
79 | DEFINE_BITOP(set_bits, or, "", "") | 79 | DEFINE_BITOP(set_bits, or, "", "") |
80 | DEFINE_BITOP(clear_bits, andc, "", "") | 80 | DEFINE_BITOP(clear_bits, andc, "", "") |
81 | DEFINE_BITOP(clear_bits_unlock, andc, LWSYNC_ON_SMP, "") | 81 | DEFINE_BITOP(clear_bits_unlock, andc, PPC_RELEASE_BARRIER, "") |
82 | DEFINE_BITOP(change_bits, xor, "", "") | 82 | DEFINE_BITOP(change_bits, xor, "", "") |
83 | 83 | ||
84 | static __inline__ void set_bit(int nr, volatile unsigned long *addr) | 84 | static __inline__ void set_bit(int nr, volatile unsigned long *addr) |
@@ -124,10 +124,14 @@ static __inline__ unsigned long fn( \ | |||
124 | return (old & mask); \ | 124 | return (old & mask); \ |
125 | } | 125 | } |
126 | 126 | ||
127 | DEFINE_TESTOP(test_and_set_bits, or, LWSYNC_ON_SMP, ISYNC_ON_SMP, 0) | 127 | DEFINE_TESTOP(test_and_set_bits, or, PPC_RELEASE_BARRIER, |
128 | DEFINE_TESTOP(test_and_set_bits_lock, or, "", ISYNC_ON_SMP, 1) | 128 | PPC_ACQUIRE_BARRIER, 0) |
129 | DEFINE_TESTOP(test_and_clear_bits, andc, LWSYNC_ON_SMP, ISYNC_ON_SMP, 0) | 129 | DEFINE_TESTOP(test_and_set_bits_lock, or, "", |
130 | DEFINE_TESTOP(test_and_change_bits, xor, LWSYNC_ON_SMP, ISYNC_ON_SMP, 0) | 130 | PPC_ACQUIRE_BARRIER, 1) |
131 | DEFINE_TESTOP(test_and_clear_bits, andc, PPC_RELEASE_BARRIER, | ||
132 | PPC_ACQUIRE_BARRIER, 0) | ||
133 | DEFINE_TESTOP(test_and_change_bits, xor, PPC_RELEASE_BARRIER, | ||
134 | PPC_ACQUIRE_BARRIER, 0) | ||
131 | 135 | ||
132 | static __inline__ int test_and_set_bit(unsigned long nr, | 136 | static __inline__ int test_and_set_bit(unsigned long nr, |
133 | volatile unsigned long *addr) | 137 | volatile unsigned long *addr) |
@@ -158,7 +162,7 @@ static __inline__ int test_and_change_bit(unsigned long nr, | |||
158 | 162 | ||
159 | static __inline__ void __clear_bit_unlock(int nr, volatile unsigned long *addr) | 163 | static __inline__ void __clear_bit_unlock(int nr, volatile unsigned long *addr) |
160 | { | 164 | { |
161 | __asm__ __volatile__(LWSYNC_ON_SMP "" ::: "memory"); | 165 | __asm__ __volatile__(PPC_RELEASE_BARRIER "" ::: "memory"); |
162 | __clear_bit(nr, addr); | 166 | __clear_bit(nr, addr); |
163 | } | 167 | } |
164 | 168 | ||