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authorKumar Gala <galak@kernel.crashing.org>2007-09-12 19:23:46 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-09-14 09:53:22 -0400
commit1b3c5cdab49a605f0e048e1ccbf4cc61a2626485 (patch)
treeb81e6642588b00a7dbb42611614e745517b6a6b9 /arch/powerpc/boot/dts/mpc8560ads.dts
parentf0c8ac8083cbd9347b398bfddcca20f1e2786016 (diff)
[POWERPC] Move PCI nodes to be sibilings with SOC nodes
Updated the device trees to have the PCI nodes be at the same level as the SOC node. This is to make it so that the SOC nodes children address space is just on chip registers and not other bus memory as well. Also, for PCIe nodes added a P2P bridge to handle the virtual P2P bridge that exists in the PHB. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8560ads.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8560ads.dts180
1 files changed, 90 insertions, 90 deletions
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index cf87c30cf6a..5577ec1f312 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -130,96 +130,6 @@
130 phy-handle = <&phy1>; 130 phy-handle = <&phy1>;
131 }; 131 };
132 132
133 pci@8000 {
134 #interrupt-cells = <1>;
135 #size-cells = <2>;
136 #address-cells = <3>;
137 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
138 device_type = "pci";
139 reg = <8000 1000>;
140 clock-frequency = <3f940aa>;
141 interrupt-map-mask = <f800 0 0 7>;
142 interrupt-map = <
143
144 /* IDSEL 0x2 */
145 1000 0 0 1 &mpic 1 1
146 1000 0 0 2 &mpic 2 1
147 1000 0 0 3 &mpic 3 1
148 1000 0 0 4 &mpic 4 1
149
150 /* IDSEL 0x3 */
151 1800 0 0 1 &mpic 4 1
152 1800 0 0 2 &mpic 1 1
153 1800 0 0 3 &mpic 2 1
154 1800 0 0 4 &mpic 3 1
155
156 /* IDSEL 0x4 */
157 2000 0 0 1 &mpic 3 1
158 2000 0 0 2 &mpic 4 1
159 2000 0 0 3 &mpic 1 1
160 2000 0 0 4 &mpic 2 1
161
162 /* IDSEL 0x5 */
163 2800 0 0 1 &mpic 2 1
164 2800 0 0 2 &mpic 3 1
165 2800 0 0 3 &mpic 4 1
166 2800 0 0 4 &mpic 1 1
167
168 /* IDSEL 12 */
169 6000 0 0 1 &mpic 1 1
170 6000 0 0 2 &mpic 2 1
171 6000 0 0 3 &mpic 3 1
172 6000 0 0 4 &mpic 4 1
173
174 /* IDSEL 13 */
175 6800 0 0 1 &mpic 4 1
176 6800 0 0 2 &mpic 1 1
177 6800 0 0 3 &mpic 2 1
178 6800 0 0 4 &mpic 3 1
179
180 /* IDSEL 14*/
181 7000 0 0 1 &mpic 3 1
182 7000 0 0 2 &mpic 4 1
183 7000 0 0 3 &mpic 1 1
184 7000 0 0 4 &mpic 2 1
185
186 /* IDSEL 15 */
187 7800 0 0 1 &mpic 2 1
188 7800 0 0 2 &mpic 3 1
189 7800 0 0 3 &mpic 4 1
190 7800 0 0 4 &mpic 1 1
191
192 /* IDSEL 18 */
193 9000 0 0 1 &mpic 1 1
194 9000 0 0 2 &mpic 2 1
195 9000 0 0 3 &mpic 3 1
196 9000 0 0 4 &mpic 4 1
197
198 /* IDSEL 19 */
199 9800 0 0 1 &mpic 4 1
200 9800 0 0 2 &mpic 1 1
201 9800 0 0 3 &mpic 2 1
202 9800 0 0 4 &mpic 3 1
203
204 /* IDSEL 20 */
205 a000 0 0 1 &mpic 3 1
206 a000 0 0 2 &mpic 4 1
207 a000 0 0 3 &mpic 1 1
208 a000 0 0 4 &mpic 2 1
209
210 /* IDSEL 21 */
211 a800 0 0 1 &mpic 2 1
212 a800 0 0 2 &mpic 3 1
213 a800 0 0 3 &mpic 4 1
214 a800 0 0 4 &mpic 1 1>;
215
216 interrupt-parent = <&mpic>;
217 interrupts = <18 2>;
218 bus-range = <0 0>;
219 ranges = <02000000 0 80000000 80000000 0 20000000
220 01000000 0 00000000 e2000000 0 01000000>;
221 };
222
223 mpic: pic@40000 { 133 mpic: pic@40000 {
224 interrupt-controller; 134 interrupt-controller;
225 #address-cells = <0>; 135 #address-cells = <0>;
@@ -319,4 +229,94 @@
319 }; 229 };
320 }; 230 };
321 }; 231 };
232
233 pci@e0008000 {
234 #interrupt-cells = <1>;
235 #size-cells = <2>;
236 #address-cells = <3>;
237 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
238 device_type = "pci";
239 reg = <e0008000 1000>;
240 clock-frequency = <3f940aa>;
241 interrupt-map-mask = <f800 0 0 7>;
242 interrupt-map = <
243
244 /* IDSEL 0x2 */
245 1000 0 0 1 &mpic 1 1
246 1000 0 0 2 &mpic 2 1
247 1000 0 0 3 &mpic 3 1
248 1000 0 0 4 &mpic 4 1
249
250 /* IDSEL 0x3 */
251 1800 0 0 1 &mpic 4 1
252 1800 0 0 2 &mpic 1 1
253 1800 0 0 3 &mpic 2 1
254 1800 0 0 4 &mpic 3 1
255
256 /* IDSEL 0x4 */
257 2000 0 0 1 &mpic 3 1
258 2000 0 0 2 &mpic 4 1
259 2000 0 0 3 &mpic 1 1
260 2000 0 0 4 &mpic 2 1
261
262 /* IDSEL 0x5 */
263 2800 0 0 1 &mpic 2 1
264 2800 0 0 2 &mpic 3 1
265 2800 0 0 3 &mpic 4 1
266 2800 0 0 4 &mpic 1 1
267
268 /* IDSEL 12 */
269 6000 0 0 1 &mpic 1 1
270 6000 0 0 2 &mpic 2 1
271 6000 0 0 3 &mpic 3 1
272 6000 0 0 4 &mpic 4 1
273
274 /* IDSEL 13 */
275 6800 0 0 1 &mpic 4 1
276 6800 0 0 2 &mpic 1 1
277 6800 0 0 3 &mpic 2 1
278 6800 0 0 4 &mpic 3 1
279
280 /* IDSEL 14*/
281 7000 0 0 1 &mpic 3 1
282 7000 0 0 2 &mpic 4 1
283 7000 0 0 3 &mpic 1 1
284 7000 0 0 4 &mpic 2 1
285
286 /* IDSEL 15 */
287 7800 0 0 1 &mpic 2 1
288 7800 0 0 2 &mpic 3 1
289 7800 0 0 3 &mpic 4 1
290 7800 0 0 4 &mpic 1 1
291
292 /* IDSEL 18 */
293 9000 0 0 1 &mpic 1 1
294 9000 0 0 2 &mpic 2 1
295 9000 0 0 3 &mpic 3 1
296 9000 0 0 4 &mpic 4 1
297
298 /* IDSEL 19 */
299 9800 0 0 1 &mpic 4 1
300 9800 0 0 2 &mpic 1 1
301 9800 0 0 3 &mpic 2 1
302 9800 0 0 4 &mpic 3 1
303
304 /* IDSEL 20 */
305 a000 0 0 1 &mpic 3 1
306 a000 0 0 2 &mpic 4 1
307 a000 0 0 3 &mpic 1 1
308 a000 0 0 4 &mpic 2 1
309
310 /* IDSEL 21 */
311 a800 0 0 1 &mpic 2 1
312 a800 0 0 2 &mpic 3 1
313 a800 0 0 3 &mpic 4 1
314 a800 0 0 4 &mpic 1 1>;
315
316 interrupt-parent = <&mpic>;
317 interrupts = <18 2>;
318 bus-range = <0 0>;
319 ranges = <02000000 0 80000000 80000000 0 20000000
320 01000000 0 00000000 e2000000 0 01000000>;
321 };
322}; 322};