diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2007-07-03 03:35:35 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2007-07-03 03:35:35 -0400 |
commit | b533f8ae796d1ee0289bf04d4f1e72c02ad4a17d (patch) | |
tree | 4bec480194b251e18fee511df1cf4840a1995c88 /arch/powerpc/boot/dts/mpc8555cds.dts | |
parent | eae98266e78e5659d75dbb62b4601960c15c7830 (diff) |
[POWERPC] Reworked interrupt numbers for OpenPIC based Freescale chips
Make the interrupt numbers match the OpenPIC spec intead of the
Freescale docs which distinguish between internal and external interrupts.
Now we can use the interrupt number directly to find the register offset
associated with it.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8555cds.dts')
-rw-r--r-- | arch/powerpc/boot/dts/mpc8555cds.dts | 86 |
1 files changed, 43 insertions, 43 deletions
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts index c41ee616603..9b7268964e9 100644 --- a/arch/powerpc/boot/dts/mpc8555cds.dts +++ b/arch/powerpc/boot/dts/mpc8555cds.dts | |||
@@ -52,7 +52,7 @@ | |||
52 | compatible = "fsl,8555-memory-controller"; | 52 | compatible = "fsl,8555-memory-controller"; |
53 | reg = <2000 1000>; | 53 | reg = <2000 1000>; |
54 | interrupt-parent = <&mpic>; | 54 | interrupt-parent = <&mpic>; |
55 | interrupts = <2 2>; | 55 | interrupts = <12 2>; |
56 | }; | 56 | }; |
57 | 57 | ||
58 | l2-cache-controller@20000 { | 58 | l2-cache-controller@20000 { |
@@ -61,14 +61,14 @@ | |||
61 | cache-line-size = <20>; // 32 bytes | 61 | cache-line-size = <20>; // 32 bytes |
62 | cache-size = <40000>; // L2, 256K | 62 | cache-size = <40000>; // L2, 256K |
63 | interrupt-parent = <&mpic>; | 63 | interrupt-parent = <&mpic>; |
64 | interrupts = <0 2>; | 64 | interrupts = <10 2>; |
65 | }; | 65 | }; |
66 | 66 | ||
67 | i2c@3000 { | 67 | i2c@3000 { |
68 | device_type = "i2c"; | 68 | device_type = "i2c"; |
69 | compatible = "fsl-i2c"; | 69 | compatible = "fsl-i2c"; |
70 | reg = <3000 100>; | 70 | reg = <3000 100>; |
71 | interrupts = <1b 2>; | 71 | interrupts = <2b 2>; |
72 | interrupt-parent = <&mpic>; | 72 | interrupt-parent = <&mpic>; |
73 | dfsrr; | 73 | dfsrr; |
74 | }; | 74 | }; |
@@ -81,13 +81,13 @@ | |||
81 | reg = <24520 20>; | 81 | reg = <24520 20>; |
82 | phy0: ethernet-phy@0 { | 82 | phy0: ethernet-phy@0 { |
83 | interrupt-parent = <&mpic>; | 83 | interrupt-parent = <&mpic>; |
84 | interrupts = <35 0>; | 84 | interrupts = <5 0>; |
85 | reg = <0>; | 85 | reg = <0>; |
86 | device_type = "ethernet-phy"; | 86 | device_type = "ethernet-phy"; |
87 | }; | 87 | }; |
88 | phy1: ethernet-phy@1 { | 88 | phy1: ethernet-phy@1 { |
89 | interrupt-parent = <&mpic>; | 89 | interrupt-parent = <&mpic>; |
90 | interrupts = <35 0>; | 90 | interrupts = <5 0>; |
91 | reg = <1>; | 91 | reg = <1>; |
92 | device_type = "ethernet-phy"; | 92 | device_type = "ethernet-phy"; |
93 | }; | 93 | }; |
@@ -101,7 +101,7 @@ | |||
101 | compatible = "gianfar"; | 101 | compatible = "gianfar"; |
102 | reg = <24000 1000>; | 102 | reg = <24000 1000>; |
103 | local-mac-address = [ 00 00 00 00 00 00 ]; | 103 | local-mac-address = [ 00 00 00 00 00 00 ]; |
104 | interrupts = <0d 2 0e 2 12 2>; | 104 | interrupts = <1d 2 1e 2 22 2>; |
105 | interrupt-parent = <&mpic>; | 105 | interrupt-parent = <&mpic>; |
106 | phy-handle = <&phy0>; | 106 | phy-handle = <&phy0>; |
107 | }; | 107 | }; |
@@ -114,7 +114,7 @@ | |||
114 | compatible = "gianfar"; | 114 | compatible = "gianfar"; |
115 | reg = <25000 1000>; | 115 | reg = <25000 1000>; |
116 | local-mac-address = [ 00 00 00 00 00 00 ]; | 116 | local-mac-address = [ 00 00 00 00 00 00 ]; |
117 | interrupts = <13 2 14 2 18 2>; | 117 | interrupts = <23 2 24 2 28 2>; |
118 | interrupt-parent = <&mpic>; | 118 | interrupt-parent = <&mpic>; |
119 | phy-handle = <&phy1>; | 119 | phy-handle = <&phy1>; |
120 | }; | 120 | }; |
@@ -124,7 +124,7 @@ | |||
124 | compatible = "ns16550"; | 124 | compatible = "ns16550"; |
125 | reg = <4500 100>; // reg base, size | 125 | reg = <4500 100>; // reg base, size |
126 | clock-frequency = <0>; // should we fill in in uboot? | 126 | clock-frequency = <0>; // should we fill in in uboot? |
127 | interrupts = <1a 2>; | 127 | interrupts = <2a 2>; |
128 | interrupt-parent = <&mpic>; | 128 | interrupt-parent = <&mpic>; |
129 | }; | 129 | }; |
130 | 130 | ||
@@ -133,7 +133,7 @@ | |||
133 | compatible = "ns16550"; | 133 | compatible = "ns16550"; |
134 | reg = <4600 100>; // reg base, size | 134 | reg = <4600 100>; // reg base, size |
135 | clock-frequency = <0>; // should we fill in in uboot? | 135 | clock-frequency = <0>; // should we fill in in uboot? |
136 | interrupts = <1a 2>; | 136 | interrupts = <2a 2>; |
137 | interrupt-parent = <&mpic>; | 137 | interrupt-parent = <&mpic>; |
138 | }; | 138 | }; |
139 | 139 | ||
@@ -142,49 +142,49 @@ | |||
142 | interrupt-map = < | 142 | interrupt-map = < |
143 | 143 | ||
144 | /* IDSEL 0x10 */ | 144 | /* IDSEL 0x10 */ |
145 | 08000 0 0 1 &mpic 30 1 | 145 | 08000 0 0 1 &mpic 0 1 |
146 | 08000 0 0 2 &mpic 31 1 | 146 | 08000 0 0 2 &mpic 1 1 |
147 | 08000 0 0 3 &mpic 32 1 | 147 | 08000 0 0 3 &mpic 2 1 |
148 | 08000 0 0 4 &mpic 33 1 | 148 | 08000 0 0 4 &mpic 3 1 |
149 | 149 | ||
150 | /* IDSEL 0x11 */ | 150 | /* IDSEL 0x11 */ |
151 | 08800 0 0 1 &mpic 30 1 | 151 | 08800 0 0 1 &mpic 0 1 |
152 | 08800 0 0 2 &mpic 31 1 | 152 | 08800 0 0 2 &mpic 1 1 |
153 | 08800 0 0 3 &mpic 32 1 | 153 | 08800 0 0 3 &mpic 2 1 |
154 | 08800 0 0 4 &mpic 33 1 | 154 | 08800 0 0 4 &mpic 3 1 |
155 | 155 | ||
156 | /* IDSEL 0x12 (Slot 1) */ | 156 | /* IDSEL 0x12 (Slot 1) */ |
157 | 09000 0 0 1 &mpic 30 1 | 157 | 09000 0 0 1 &mpic 0 1 |
158 | 09000 0 0 2 &mpic 31 1 | 158 | 09000 0 0 2 &mpic 1 1 |
159 | 09000 0 0 3 &mpic 32 1 | 159 | 09000 0 0 3 &mpic 2 1 |
160 | 09000 0 0 4 &mpic 33 1 | 160 | 09000 0 0 4 &mpic 3 1 |
161 | 161 | ||
162 | /* IDSEL 0x13 (Slot 2) */ | 162 | /* IDSEL 0x13 (Slot 2) */ |
163 | 09800 0 0 1 &mpic 31 1 | 163 | 09800 0 0 1 &mpic 1 1 |
164 | 09800 0 0 2 &mpic 32 1 | 164 | 09800 0 0 2 &mpic 2 1 |
165 | 09800 0 0 3 &mpic 33 1 | 165 | 09800 0 0 3 &mpic 3 1 |
166 | 09800 0 0 4 &mpic 30 1 | 166 | 09800 0 0 4 &mpic 0 1 |
167 | 167 | ||
168 | /* IDSEL 0x14 (Slot 3) */ | 168 | /* IDSEL 0x14 (Slot 3) */ |
169 | 0a000 0 0 1 &mpic 32 1 | 169 | 0a000 0 0 1 &mpic 2 1 |
170 | 0a000 0 0 2 &mpic 33 1 | 170 | 0a000 0 0 2 &mpic 3 1 |
171 | 0a000 0 0 3 &mpic 30 1 | 171 | 0a000 0 0 3 &mpic 0 1 |
172 | 0a000 0 0 4 &mpic 31 1 | 172 | 0a000 0 0 4 &mpic 1 1 |
173 | 173 | ||
174 | /* IDSEL 0x15 (Slot 4) */ | 174 | /* IDSEL 0x15 (Slot 4) */ |
175 | 0a800 0 0 1 &mpic 33 1 | 175 | 0a800 0 0 1 &mpic 3 1 |
176 | 0a800 0 0 2 &mpic 30 1 | 176 | 0a800 0 0 2 &mpic 0 1 |
177 | 0a800 0 0 3 &mpic 31 1 | 177 | 0a800 0 0 3 &mpic 1 1 |
178 | 0a800 0 0 4 &mpic 32 1 | 178 | 0a800 0 0 4 &mpic 2 1 |
179 | 179 | ||
180 | /* Bus 1 (Tundra Bridge) */ | 180 | /* Bus 1 (Tundra Bridge) */ |
181 | /* IDSEL 0x12 (ISA bridge) */ | 181 | /* IDSEL 0x12 (ISA bridge) */ |
182 | 19000 0 0 1 &mpic 30 1 | 182 | 19000 0 0 1 &mpic 0 1 |
183 | 19000 0 0 2 &mpic 31 1 | 183 | 19000 0 0 2 &mpic 1 1 |
184 | 19000 0 0 3 &mpic 32 1 | 184 | 19000 0 0 3 &mpic 2 1 |
185 | 19000 0 0 4 &mpic 33 1>; | 185 | 19000 0 0 4 &mpic 3 1>; |
186 | interrupt-parent = <&mpic>; | 186 | interrupt-parent = <&mpic>; |
187 | interrupts = <08 2>; | 187 | interrupts = <18 2>; |
188 | bus-range = <0 0>; | 188 | bus-range = <0 0>; |
189 | ranges = <02000000 0 80000000 80000000 0 20000000 | 189 | ranges = <02000000 0 80000000 80000000 0 20000000 |
190 | 01000000 0 00000000 e2000000 0 00100000>; | 190 | 01000000 0 00000000 e2000000 0 00100000>; |
@@ -216,12 +216,12 @@ | |||
216 | interrupt-map = < | 216 | interrupt-map = < |
217 | 217 | ||
218 | /* IDSEL 0x15 */ | 218 | /* IDSEL 0x15 */ |
219 | a800 0 0 1 &mpic 3b 1 | 219 | a800 0 0 1 &mpic b 1 |
220 | a800 0 0 2 &mpic 3b 1 | 220 | a800 0 0 2 &mpic b 1 |
221 | a800 0 0 3 &mpic 3b 1 | 221 | a800 0 0 3 &mpic b 1 |
222 | a800 0 0 4 &mpic 3b 1>; | 222 | a800 0 0 4 &mpic b 1>; |
223 | interrupt-parent = <&mpic>; | 223 | interrupt-parent = <&mpic>; |
224 | interrupts = <09 2>; | 224 | interrupts = <19 2>; |
225 | bus-range = <0 0>; | 225 | bus-range = <0 0>; |
226 | ranges = <02000000 0 a0000000 a0000000 0 20000000 | 226 | ranges = <02000000 0 a0000000 a0000000 0 20000000 |
227 | 01000000 0 00000000 e3000000 0 00100000>; | 227 | 01000000 0 00000000 e3000000 0 00100000>; |