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authorChris Dearman <chris@mips.com>2007-09-14 16:21:58 -0400
committerRalf Baechle <ralf@linux-mips.org>2008-04-28 12:14:25 -0400
commit0bfa130e741f8f73a7bbf6a89aad4816e9094a71 (patch)
tree2a363f3a64cf66764711cce81bf190ffdd5936cd /arch/mips/kernel
parent0b6d497fcbb72b356c9d6446810a9597ee55c432 (diff)
[MIPS] Remove TLB sanitation code
It is not being used by Malta and shouldn't be needed for MIPSsim. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/smp-mt.c47
-rw-r--r--arch/mips/kernel/smtc.c8
2 files changed, 0 insertions, 55 deletions
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index 89e6f6aa516..e9c393a4177 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -58,53 +58,6 @@ static void dump_mtregisters(int vpe, int tc)
58} 58}
59#endif 59#endif
60 60
61void __init sanitize_tlb_entries(void)
62{
63 int i, tlbsiz;
64 unsigned long mvpconf0, ncpu;
65
66 if (!cpu_has_mipsmt)
67 return;
68
69 /* Enable VPC */
70 set_c0_mvpcontrol(MVPCONTROL_VPC);
71
72 back_to_back_c0_hazard();
73
74 /* Disable TLB sharing */
75 clear_c0_mvpcontrol(MVPCONTROL_STLB);
76
77 mvpconf0 = read_c0_mvpconf0();
78
79 printk(KERN_INFO "MVPConf0 0x%lx TLBS %lx PTLBE %ld\n", mvpconf0,
80 (mvpconf0 & MVPCONF0_TLBS) >> MVPCONF0_TLBS_SHIFT,
81 (mvpconf0 & MVPCONF0_PTLBE) >> MVPCONF0_PTLBE_SHIFT);
82
83 tlbsiz = (mvpconf0 & MVPCONF0_PTLBE) >> MVPCONF0_PTLBE_SHIFT;
84 ncpu = ((mvpconf0 & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT) + 1;
85
86 printk(" tlbsiz %d ncpu %ld\n", tlbsiz, ncpu);
87
88 if (tlbsiz > 0) {
89 /* share them out across the vpe's */
90 tlbsiz /= ncpu;
91
92 printk(KERN_INFO "setting Config1.MMU_size to %d\n", tlbsiz);
93
94 for (i = 0; i < ncpu; i++) {
95 settc(i);
96
97 if (i == 0)
98 write_c0_config1((read_c0_config1() & ~(0x3f << 25)) | (tlbsiz << 25));
99 else
100 write_vpe_c0_config1((read_vpe_c0_config1() & ~(0x3f << 25)) |
101 (tlbsiz << 25));
102 }
103 }
104
105 clear_c0_mvpcontrol(MVPCONTROL_VPC);
106}
107
108static void ipi_resched_dispatch(void) 61static void ipi_resched_dispatch(void)
109{ 62{
110 do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ); 63 do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ);
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index b42e71c7111..4705b3c11e5 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -174,14 +174,6 @@ static int clock_hang_reported[NR_CPUS];
174 174
175#endif /* CONFIG_SMTC_IDLE_HOOK_DEBUG */ 175#endif /* CONFIG_SMTC_IDLE_HOOK_DEBUG */
176 176
177/* Initialize shared TLB - the should probably migrate to smtc_setup_cpus() */
178
179void __init sanitize_tlb_entries(void)
180{
181 printk("Deprecated sanitize_tlb_entries() invoked\n");
182}
183
184
185/* 177/*
186 * Configure shared TLB - VPC configuration bit must be set by caller 178 * Configure shared TLB - VPC configuration bit must be set by caller
187 */ 179 */