diff options
author | Florian Fainelli <florian@openwrt.org> | 2008-10-31 09:24:29 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2008-11-20 14:42:32 -0500 |
commit | 1b432840d0a4740020e29ae7a00717ef8f44954b (patch) | |
tree | 64374760eb188224bba02321bba49b99eeff4dc6 /arch/mips/include/asm/mach-rc32434/rb.h | |
parent | 9e86786a4b17ad186f456dc6ac0508a17556731b (diff) |
MIPS: RB532: GPIO register offsets are relative to GPIOBASE
This patch fixes the wrong use of GPIO register offsets
in devices.c. To avoid further problems, use gpio_get_value
to return the NAND status instead of our own expanded code.
Also define the zero offset of the alternate function register to allow
consistent access.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-rc32434/rb.h')
-rw-r--r-- | arch/mips/include/asm/mach-rc32434/rb.h | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/arch/mips/include/asm/mach-rc32434/rb.h b/arch/mips/include/asm/mach-rc32434/rb.h index 79e8ef67d0d..f25a8491670 100644 --- a/arch/mips/include/asm/mach-rc32434/rb.h +++ b/arch/mips/include/asm/mach-rc32434/rb.h | |||
@@ -40,12 +40,14 @@ | |||
40 | #define BTCS 0x010040 | 40 | #define BTCS 0x010040 |
41 | #define BTCOMPARE 0x010044 | 41 | #define BTCOMPARE 0x010044 |
42 | #define GPIOBASE 0x050000 | 42 | #define GPIOBASE 0x050000 |
43 | #define GPIOCFG 0x050004 | 43 | /* Offsets relative to GPIOBASE */ |
44 | #define GPIOD 0x050008 | 44 | #define GPIOFUNC 0x00 |
45 | #define GPIOILEVEL 0x05000C | 45 | #define GPIOCFG 0x04 |
46 | #define GPIOISTAT 0x050010 | 46 | #define GPIOD 0x08 |
47 | #define GPIONMIEN 0x050014 | 47 | #define GPIOILEVEL 0x0C |
48 | #define IMASK6 0x038038 | 48 | #define GPIOISTAT 0x10 |
49 | #define GPIONMIEN 0x14 | ||
50 | #define IMASK6 0x38 | ||
49 | #define LO_WPX (1 << 0) | 51 | #define LO_WPX (1 << 0) |
50 | #define LO_ALE (1 << 1) | 52 | #define LO_ALE (1 << 1) |
51 | #define LO_CLE (1 << 2) | 53 | #define LO_CLE (1 << 2) |