diff options
author | Maciej W. Rozycki <macro@linux-mips.org> | 2005-07-01 12:10:40 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 14:31:35 -0400 |
commit | a5fc9c0bbee8b91025993a49a9176a88380aef3c (patch) | |
tree | e68ee45e852028ddde712abb18531777dba6e468 /arch/mips/dec/ecc-berr.c | |
parent | 7d7ee221213609319401d1b9d6dc4bf22ab928ea (diff) |
Use physical addresses at the interface level, letting drivers remap
them as appropriate.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/dec/ecc-berr.c')
-rw-r--r-- | arch/mips/dec/ecc-berr.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/mips/dec/ecc-berr.c b/arch/mips/dec/ecc-berr.c index 8f3498aa43a..cc24c5ed0c0 100644 --- a/arch/mips/dec/ecc-berr.c +++ b/arch/mips/dec/ecc-berr.c | |||
@@ -227,11 +227,11 @@ irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
227 | */ | 227 | */ |
228 | static inline void dec_kn02_be_init(void) | 228 | static inline void dec_kn02_be_init(void) |
229 | { | 229 | { |
230 | volatile u32 *csr = (void *)KN02_CSR_BASE; | 230 | volatile u32 *csr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR); |
231 | unsigned long flags; | 231 | unsigned long flags; |
232 | 232 | ||
233 | kn0x_erraddr = (void *)(KN02_SLOT_BASE + KN02_ERRADDR); | 233 | kn0x_erraddr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_ERRADDR); |
234 | kn0x_chksyn = (void *)(KN02_SLOT_BASE + KN02_CHKSYN); | 234 | kn0x_chksyn = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CHKSYN); |
235 | 235 | ||
236 | spin_lock_irqsave(&kn02_lock, flags); | 236 | spin_lock_irqsave(&kn02_lock, flags); |
237 | 237 | ||
@@ -250,11 +250,11 @@ static inline void dec_kn02_be_init(void) | |||
250 | 250 | ||
251 | static inline void dec_kn03_be_init(void) | 251 | static inline void dec_kn03_be_init(void) |
252 | { | 252 | { |
253 | volatile u32 *mcr = (void *)(KN03_SLOT_BASE + IOASIC_MCR); | 253 | volatile u32 *mcr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR); |
254 | volatile u32 *mbcs = (void *)(KN4K_SLOT_BASE + KN4K_MB_CSR); | 254 | volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR); |
255 | 255 | ||
256 | kn0x_erraddr = (void *)(KN03_SLOT_BASE + IOASIC_ERRADDR); | 256 | kn0x_erraddr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_ERRADDR); |
257 | kn0x_chksyn = (void *)(KN03_SLOT_BASE + IOASIC_CHKSYN); | 257 | kn0x_chksyn = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_CHKSYN); |
258 | 258 | ||
259 | /* | 259 | /* |
260 | * Set normal ECC detection and generation, enable ECC correction. | 260 | * Set normal ECC detection and generation, enable ECC correction. |