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authorGreg Ungerer <gerg@uclinux.org>2009-05-05 21:36:00 -0400
committerGreg Ungerer <gerg@uclinux.org>2009-09-15 19:43:47 -0400
commitf1a59d244abd8d7b94b90f45ee5e0988e5a154cb (patch)
tree7e809b6d848ff9a4a9b9618c9e4df338d055c860 /arch/m68k/include/asm/m520xsim.h
parenta3d9bf1dfdaf6f7df6c5340521dff1aafe39393f (diff)
m68knommu: remove interrupt masking from ColdFire pit timer
With proper interrupt controller code in place there is no need for devices like the timers to have custom interrupt masking code. Remove it (and the defines that go along with it). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/m520xsim.h')
-rw-r--r--arch/m68k/include/asm/m520xsim.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h
index 91de39c8d86..ed2b69b9680 100644
--- a/arch/m68k/include/asm/m520xsim.h
+++ b/arch/m68k/include/asm/m520xsim.h
@@ -124,10 +124,6 @@
124#define MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2 (0x02) 124#define MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2 (0x02)
125#define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 (0x04) 125#define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 (0x04)
126 126
127#define ICR_INTRCONF 0x05
128#define MCFPIT_IMR MCFINTC_IMRL
129#define MCFPIT_IMR_IBIT (1 << MCFINT_PIT1)
130
131/* 127/*
132 * Reset Controll Unit. 128 * Reset Controll Unit.
133 */ 129 */