Merge branch 'for-linus' of git://www.jni.nu/cris

* 'for-linus' of git://www.jni.nu/cris: (51 commits)
  CRIS: Fix alignment problem for older ld
  CRIS: Always dump registers for segfaulting process.
  CRIS: Add config for pausing a seg-faulting process
  CRIS: Don't take faults while in_atomic
  CRIS: Fixup lookup for delay slot faults
  CRIS: Discard exit.text and .data at runtime
  CRIS: Add cache aligned and read mostly data sections
  CRIS: Return something from profile write
  CRIS: Add ARTPEC-3 and timestamps for sync-serial
  CRIS: Better ARTPEC-3 support for gpio
  CRIS: Add include guard
  CRIS: Better handling of pinmux settings
  CRIS: New DMA defines for ARTPEC-3
  CRIS: __do_strncpy_from_user: Don't read the byte beyond the nil
  CRIS: Pagetable for ARTPEC-3
  CRIS: Machine dependent memmap.h
  CRIS: Check if pointer is set before using it
  CRIS: Machine dependent dma.h
  CRIS: Define __read_mostly for CRISv32
  CRIS: Discard .note.gnu.build-id section
  ...

2 files changed, 22 insertions, 5 deletions

diff --git a/arch/cris/arch-v32/mm/init.c b/arch/cris/arch-v32/mm/init.c
index caeb921a92e..0768bc409ca 100644
--- a/arch/cris/arch-v32/mm/init.c
+++ b/arch/cris/arch-v32/mm/init.c
@@ -27,8 +27,7 @@ extern void tlb_init(void);
  * at kseg_4 thus the ksegs are set up again. Also clear the TLB and do various
  * other paging stuff.
  */
-void __init
-cris_mmu_init(void)
+void __init cris_mmu_init(void)
 {
         unsigned long mmu_config;
         unsigned long mmu_kbase_hi;
@@ -55,14 +54,23 @@ cris_mmu_init(void)
         /* Initialise the TLB. Function found in tlb.c. */
         tlb_init();
 
-        /* Enable exceptions and initialize the kernel segments. */
+        /*
+         * Enable exceptions and initialize the kernel segments.
+         * See head.S for differences between ARTPEC-3 and ETRAX FS.
+         */
         mmu_config = ( REG_STATE(mmu, rw_mm_cfg, we, on)        |
                        REG_STATE(mmu, rw_mm_cfg, acc, on)       |
                        REG_STATE(mmu, rw_mm_cfg, ex, on)        |
                        REG_STATE(mmu, rw_mm_cfg, inv, on)       |
+#ifdef CONFIG_CRIS_MACH_ARTPEC3
+                       REG_STATE(mmu, rw_mm_cfg, seg_f, page)   |
+                       REG_STATE(mmu, rw_mm_cfg, seg_e, page)   |
+                       REG_STATE(mmu, rw_mm_cfg, seg_d, linear) |
+#else
                        REG_STATE(mmu, rw_mm_cfg, seg_f, linear) |
                        REG_STATE(mmu, rw_mm_cfg, seg_e, linear) |
                        REG_STATE(mmu, rw_mm_cfg, seg_d, page)   |
+#endif
                        REG_STATE(mmu, rw_mm_cfg, seg_c, linear) |
                        REG_STATE(mmu, rw_mm_cfg, seg_b, linear) |
 #ifndef CONFIG_ETRAX_VCS_SIM
@@ -81,9 +89,15 @@ cris_mmu_init(void)
                        REG_STATE(mmu, rw_mm_cfg, seg_1, page)   |
                        REG_STATE(mmu, rw_mm_cfg, seg_0, page));
 
+        /* See head.S for differences between ARTPEC-3 and ETRAX FS. */
         mmu_kbase_hi = ( REG_FIELD(mmu, rw_mm_kbase_hi, base_f, 0x0) |
+#ifdef CONFIG_CRIS_MACH_ARTPEC3
+                         REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 0x0) |
+                         REG_FIELD(mmu, rw_mm_kbase_hi, base_d, 0x5) |
+#else
                          REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 0x8) |
                          REG_FIELD(mmu, rw_mm_kbase_hi, base_d, 0x0) |
+#endif
                          REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 0x4) |
                          REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb) |
 #ifndef CONFIG_ETRAX_VCS_SIM
@@ -129,8 +143,7 @@ cris_mmu_init(void)
         SUPP_REG_WR(RW_GC_CFG, 0xf); /* IMMU, DMMU, ICache, DCache on */
 }
 
-void __init
-paging_init(void)
+void __init paging_init(void)
 {
         int i;
         unsigned long zones_size[MAX_NR_ZONES];
diff --git a/arch/cris/arch-v32/mm/mmu.S b/arch/cris/arch-v32/mm/mmu.S
index f125d912e14..72727c1d8e6 100644
--- a/arch/cris/arch-v32/mm/mmu.S
+++ b/arch/cris/arch-v32/mm/mmu.S
@@ -38,6 +38,7 @@
 ; to handle the fault.
 .macro  MMU_BUS_FAULT_HANDLER handler, mmu, we, ex
         .globl  \handler
+        .type   \handler,"function"
 \handler:
         SAVE_ALL
         move    \mmu, $srs      ; Select MMU support register bank
@@ -52,6 +53,7 @@
         nop
         ba      ret_from_intr
         nop
+        .size   \handler, . - \handler
 .endm
 
 ; Refill handler. Three cases may occur:
@@ -84,6 +86,7 @@
 2:      .dword  0               ; last_refill_cause
         .text
         .globl \handler
+        .type   \handler, "function"
 \handler:
         subq    4, $sp
 ; (The pipeline stalls for one cycle; $sp used as address in the next cycle.)
@@ -196,6 +199,7 @@
         ; Return
         ba      ret_from_intr
         nop
+        .size   \handler, . - \handler
 .endm
 
         ; This is the MMU bus fault handlers.