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authorBryan Wu <bryan.wu@analog.com>2007-05-06 17:50:22 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-07 15:12:58 -0400
commit1394f03221790a988afc3e4b3cb79f2e477246a9 (patch)
tree2c1963c9a4f2d84a5e021307fde240c5d567cf70 /arch/blackfin/mach-bf537/boards/generic_board.c
parent73243284463a761e04d69d22c7516b2be7de096c (diff)
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/blackfin/mach-bf537/boards/generic_board.c')
-rw-r--r--arch/blackfin/mach-bf537/boards/generic_board.c445
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diff --git a/arch/blackfin/mach-bf537/boards/generic_board.c b/arch/blackfin/mach-bf537/boards/generic_board.c
new file mode 100644
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@@ -0,0 +1,445 @@
1/*
2 * File: arch/blackfin/mach-bf537/boards/generic_board.c
3 * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h>
35#include <linux/spi/spi.h>
36#include <linux/spi/flash.h>
37#include <linux/usb_isp1362.h>
38#include <asm/irq.h>
39#include <asm/bfin5xx_spi.h>
40#include <linux/usb_sl811.h>
41
42/*
43 * Name the Board for the /proc/cpuinfo
44 */
45char *bfin_board_name = "UNKNOWN BOARD";
46
47/*
48 * Driver needs to know address, irq and flag pin.
49 */
50
51#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
52static struct resource bfin_pcmcia_cf_resources[] = {
53 {
54 .start = 0x20310000, /* IO PORT */
55 .end = 0x20312000,
56 .flags = IORESOURCE_MEM,
57 },{
58 .start = 0x20311000, /* Attribute Memeory */
59 .end = 0x20311FFF,
60 .flags = IORESOURCE_MEM,
61 },{
62 .start = IRQ_PROG_INTA,
63 .end = IRQ_PROG_INTA,
64 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
65 },{
66 .start = IRQ_PF4,
67 .end = IRQ_PF4,
68 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
69 },{
70 .start = 6, /* Card Detect PF6 */
71 .end = 6,
72 .flags = IORESOURCE_IRQ,
73 },
74};
75
76static struct platform_device bfin_pcmcia_cf_device = {
77 .name = "bfin_cf_pcmcia",
78 .id = -1,
79 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
80 .resource = bfin_pcmcia_cf_resources,
81};
82#endif
83
84#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
85static struct platform_device rtc_device = {
86 .name = "rtc-bfin",
87 .id = -1,
88};
89#endif
90
91#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
92static struct resource smc91x_resources[] = {
93 {
94 .name = "smc91x-regs",
95 .start = 0x20300300,
96 .end = 0x20300300 + 16,
97 .flags = IORESOURCE_MEM,
98 },{
99 .start = IRQ_PROG_INTB,
100 .end = IRQ_PROG_INTB,
101 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
102 },{
103 /*
104 * denotes the flag pin and is used directly if
105 * CONFIG_IRQCHIP_DEMUX_GPIO is defined.
106 */
107 .start = IRQ_PF7,
108 .end = IRQ_PF7,
109 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
110 },
111};
112static struct platform_device smc91x_device = {
113 .name = "smc91x",
114 .id = 0,
115 .num_resources = ARRAY_SIZE(smc91x_resources),
116 .resource = smc91x_resources,
117};
118#endif
119
120#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
121static struct resource sl811_hcd_resources[] = {
122 {
123 .start = 0x20340000,
124 .end = 0x20340000,
125 .flags = IORESOURCE_MEM,
126 },{
127 .start = 0x20340004,
128 .end = 0x20340004,
129 .flags = IORESOURCE_MEM,
130 },{
131 .start = IRQ_PROG_INTA,
132 .end = IRQ_PROG_INTA,
133 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
134 },{
135 .start = IRQ_PF0 + CONFIG_USB_SL811_BFIN_GPIO,
136 .end = IRQ_PF0 + CONFIG_USB_SL811_BFIN_GPIO,
137 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
138 },
139};
140
141#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
142void sl811_port_power(struct device *dev, int is_on)
143{
144 unsigned short mask = (1<<CONFIG_USB_SL811_BFIN_GPIO_VBUS);
145
146 bfin_write_PORT_FER(bfin_read_PORT_FER() & ~mask);
147 bfin_write_FIO_DIR(bfin_read_FIO_DIR() | mask);
148
149 if (is_on)
150 bfin_write_FIO_FLAG_S(mask);
151 else
152 bfin_write_FIO_FLAG_C(mask);
153}
154#endif
155
156static struct sl811_platform_data sl811_priv = {
157 .potpg = 10,
158 .power = 250, /* == 500mA */
159#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
160 .port_power = &sl811_port_power,
161#endif
162};
163
164static struct platform_device sl811_hcd_device = {
165 .name = "sl811-hcd",
166 .id = 0,
167 .dev = {
168 .platform_data = &sl811_priv,
169 },
170 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
171 .resource = sl811_hcd_resources,
172};
173
174#endif
175
176#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
177static struct resource isp1362_hcd_resources[] = {
178 {
179 .start = 0x20360000,
180 .end = 0x20360000,
181 .flags = IORESOURCE_MEM,
182 },{
183 .start = 0x20360004,
184 .end = 0x20360004,
185 .flags = IORESOURCE_MEM,
186 },{
187 .start = IRQ_PROG_INTA,
188 .end = IRQ_PROG_INTA,
189 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
190 },{
191 .start = IRQ_PF0 + CONFIG_USB_ISP1362_BFIN_GPIO,
192 .end = IRQ_PF0 + CONFIG_USB_ISP1362_BFIN_GPIO,
193 .flags = IORESOURCE_IRQ,
194 },
195};
196
197static struct isp1362_platform_data isp1362_priv = {
198 .sel15Kres = 1,
199 .clknotstop = 0,
200 .oc_enable = 0,
201 .int_act_high = 0,
202 .int_edge_triggered = 0,
203 .remote_wakeup_connected = 0,
204 .no_power_switching = 1,
205 .power_switching_mode = 0,
206};
207
208static struct platform_device isp1362_hcd_device = {
209 .name = "isp1362-hcd",
210 .id = 0,
211 .dev = {
212 .platform_data = &isp1362_priv,
213 },
214 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
215 .resource = isp1362_hcd_resources,
216};
217#endif
218
219#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
220static struct platform_device bfin_mac_device = {
221 .name = "bfin_mac",
222};
223#endif
224
225#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
226static struct resource net2272_bfin_resources[] = {
227 {
228 .start = 0x20300000,
229 .end = 0x20300000 + 0x100,
230 .flags = IORESOURCE_MEM,
231 },{
232 .start = IRQ_PF7,
233 .end = IRQ_PF7,
234 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
235 },
236};
237
238static struct platform_device net2272_bfin_device = {
239 .name = "net2272",
240 .id = -1,
241 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
242 .resource = net2272_bfin_resources,
243};
244#endif
245
246#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
247/* all SPI peripherals info goes here */
248
249#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
250static struct mtd_partition bfin_spi_flash_partitions[] = {
251 {
252 .name = "bootloader",
253 .size = 0x00020000,
254 .offset = 0,
255 .mask_flags = MTD_CAP_ROM
256 },{
257 .name = "kernel",
258 .size = 0xe0000,
259 .offset = 0x20000
260 },{
261 .name = "file system",
262 .size = 0x700000,
263 .offset = 0x00100000,
264 }
265};
266
267static struct flash_platform_data bfin_spi_flash_data = {
268 .name = "m25p80",
269 .parts = bfin_spi_flash_partitions,
270 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
271 .type = "m25p64",
272};
273
274/* SPI flash chip (m25p64) */
275static struct bfin5xx_spi_chip spi_flash_chip_info = {
276 .enable_dma = 0, /* use dma transfer with this chip*/
277 .bits_per_word = 8,
278};
279#endif
280
281#if defined(CONFIG_SPI_ADC_BF533) \
282 || defined(CONFIG_SPI_ADC_BF533_MODULE)
283/* SPI ADC chip */
284static struct bfin5xx_spi_chip spi_adc_chip_info = {
285 .enable_dma = 1, /* use dma transfer with this chip*/
286 .bits_per_word = 16,
287};
288#endif
289
290#if defined(CONFIG_SND_BLACKFIN_AD1836) \
291 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
292static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
293 .enable_dma = 0,
294 .bits_per_word = 16,
295};
296#endif
297
298#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
299static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
300 .enable_dma = 0,
301 .bits_per_word = 16,
302};
303#endif
304
305static struct spi_board_info bfin_spi_board_info[] __initdata = {
306#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
307 {
308 /* the modalias must be the same as spi device driver name */
309 .modalias = "m25p80", /* Name of spi_driver for this device */
310 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
311 .bus_num = 1, /* Framework bus number */
312 .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL1*/
313 .platform_data = &bfin_spi_flash_data,
314 .controller_data = &spi_flash_chip_info,
315 .mode = SPI_MODE_3,
316 },
317#endif
318
319#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
320 {
321 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
322 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
323 .bus_num = 1, /* Framework bus number */
324 .chip_select = 1, /* Framework chip select. */
325 .platform_data = NULL, /* No spi_driver specific config */
326 .controller_data = &spi_adc_chip_info,
327 },
328#endif
329
330#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
331 {
332 .modalias = "ad1836-spi",
333 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
334 .bus_num = 1,
335 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
336 .controller_data = &ad1836_spi_chip_info,
337 },
338#endif
339
340#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
341 {
342 .modalias = "ad9960-spi",
343 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
344 .bus_num = 1,
345 .chip_select = 1,
346 .controller_data = &ad9960_spi_chip_info,
347 },
348#endif
349};
350
351/* SPI controller data */
352static struct bfin5xx_spi_master spi_bfin_master_info = {
353 .num_chipselect = 8,
354 .enable_dma = 1, /* master has the ability to do dma transfer */
355};
356
357static struct platform_device spi_bfin_master_device = {
358 .name = "bfin-spi-master",
359 .id = 1, /* Bus number */
360 .dev = {
361 .platform_data = &spi_bfin_master_info, /* Passed to driver */
362 },
363};
364#endif /* spi master and devices */
365
366#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
367static struct platform_device bfin_fb_device = {
368 .name = "bf537-fb",
369};
370#endif
371
372#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
373static struct resource bfin_uart_resources[] = {
374 {
375 .start = 0xFFC00400,
376 .end = 0xFFC004FF,
377 .flags = IORESOURCE_MEM,
378 },{
379 .start = 0xFFC02000,
380 .end = 0xFFC020FF,
381 .flags = IORESOURCE_MEM,
382 },
383};
384
385static struct platform_device bfin_uart_device = {
386 .name = "bfin-uart",
387 .id = 1,
388 .num_resources = ARRAY_SIZE(bfin_uart_resources),
389 .resource = bfin_uart_resources,
390};
391#endif
392
393static struct platform_device *stamp_devices[] __initdata = {
394#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
395 &rtc_device,
396#endif
397
398#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
399 &bfin_pcmcia_cf_device,
400#endif
401
402#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
403 &sl811_hcd_device,
404#endif
405
406#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
407 &isp1362_hcd_device,
408#endif
409
410#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
411 &smc91x_device,
412#endif
413
414#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
415 &bfin_mac_device,
416#endif
417
418#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
419 &net2272_bfin_device,
420#endif
421
422#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
423 &spi_bfin_master_device,
424#endif
425
426#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
427 &bfin_fb_device,
428#endif
429
430#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
431 &bfin_uart_device,
432#endif
433};
434
435static int __init stamp_init(void)
436{
437 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
438 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
439#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
440 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
441#endif
442 return 0;
443}
444
445arch_initcall(stamp_init);