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authorMichael Hennerich <michael.hennerich@analog.com>2008-10-28 06:18:47 -0400
committerBryan Wu <cooloney@kernel.org>2008-10-28 06:18:47 -0400
commite04f9f427bca526d7752879a5b3d341628c0cc0d (patch)
tree511d0ac1fbbfaf7832b14461a2eee203cff6a2a4 /arch/blackfin/kernel/bfin_dma_5xx.c
parenta2ba8b19989e038bdf1a9fcc25e860d5077d2474 (diff)
Blackfin arch: Remove useless SSYNCs in DMA code
Tons of SSYNC operation will impact the DMA performance Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/kernel/bfin_dma_5xx.c')
-rw-r--r--arch/blackfin/kernel/bfin_dma_5xx.c14
1 files changed, 1 insertions, 13 deletions
diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c
index add58d21936..35d51ac3a06 100644
--- a/arch/blackfin/kernel/bfin_dma_5xx.c
+++ b/arch/blackfin/kernel/bfin_dma_5xx.c
@@ -53,7 +53,6 @@ static void clear_dma_buffer(unsigned int channel)
53 dma_ch[channel].regs->cfg |= RESTART; 53 dma_ch[channel].regs->cfg |= RESTART;
54 SSYNC(); 54 SSYNC();
55 dma_ch[channel].regs->cfg &= ~RESTART; 55 dma_ch[channel].regs->cfg &= ~RESTART;
56 SSYNC();
57} 56}
58 57
59static int __init blackfin_dma_init(void) 58static int __init blackfin_dma_init(void)
@@ -245,7 +244,6 @@ void enable_dma(unsigned int channel)
245 dma_ch[channel].regs->curr_y_count = 0; 244 dma_ch[channel].regs->curr_y_count = 0;
246 245
247 dma_ch[channel].regs->cfg |= DMAEN; /* Set the enable bit */ 246 dma_ch[channel].regs->cfg |= DMAEN; /* Set the enable bit */
248 SSYNC();
249 pr_debug("enable_dma() : END \n"); 247 pr_debug("enable_dma() : END \n");
250 return; 248 return;
251} 249}
@@ -265,7 +263,6 @@ void set_dma_start_addr(unsigned int channel, unsigned long addr)
265 && channel < MAX_BLACKFIN_DMA_CHANNEL)); 263 && channel < MAX_BLACKFIN_DMA_CHANNEL));
266 264
267 dma_ch[channel].regs->start_addr = addr; 265 dma_ch[channel].regs->start_addr = addr;
268 SSYNC();
269 pr_debug("set_dma_start_addr() : END\n"); 266 pr_debug("set_dma_start_addr() : END\n");
270} 267}
271EXPORT_SYMBOL(set_dma_start_addr); 268EXPORT_SYMBOL(set_dma_start_addr);
@@ -278,7 +275,6 @@ void set_dma_next_desc_addr(unsigned int channel, unsigned long addr)
278 && channel < MAX_BLACKFIN_DMA_CHANNEL)); 275 && channel < MAX_BLACKFIN_DMA_CHANNEL));
279 276
280 dma_ch[channel].regs->next_desc_ptr = addr; 277 dma_ch[channel].regs->next_desc_ptr = addr;
281 SSYNC();
282 pr_debug("set_dma_next_desc_addr() : END\n"); 278 pr_debug("set_dma_next_desc_addr() : END\n");
283} 279}
284EXPORT_SYMBOL(set_dma_next_desc_addr); 280EXPORT_SYMBOL(set_dma_next_desc_addr);
@@ -291,7 +287,6 @@ void set_dma_curr_desc_addr(unsigned int channel, unsigned long addr)
291 && channel < MAX_BLACKFIN_DMA_CHANNEL)); 287 && channel < MAX_BLACKFIN_DMA_CHANNEL));
292 288
293 dma_ch[channel].regs->curr_desc_ptr = addr; 289 dma_ch[channel].regs->curr_desc_ptr = addr;
294 SSYNC();
295 pr_debug("set_dma_curr_desc_addr() : END\n"); 290 pr_debug("set_dma_curr_desc_addr() : END\n");
296} 291}
297EXPORT_SYMBOL(set_dma_curr_desc_addr); 292EXPORT_SYMBOL(set_dma_curr_desc_addr);
@@ -302,7 +297,6 @@ void set_dma_x_count(unsigned int channel, unsigned short x_count)
302 && channel < MAX_BLACKFIN_DMA_CHANNEL)); 297 && channel < MAX_BLACKFIN_DMA_CHANNEL));
303 298
304 dma_ch[channel].regs->x_count = x_count; 299 dma_ch[channel].regs->x_count = x_count;
305 SSYNC();
306} 300}
307EXPORT_SYMBOL(set_dma_x_count); 301EXPORT_SYMBOL(set_dma_x_count);
308 302
@@ -312,7 +306,6 @@ void set_dma_y_count(unsigned int channel, unsigned short y_count)
312 && channel < MAX_BLACKFIN_DMA_CHANNEL)); 306 && channel < MAX_BLACKFIN_DMA_CHANNEL));
313 307
314 dma_ch[channel].regs->y_count = y_count; 308 dma_ch[channel].regs->y_count = y_count;
315 SSYNC();
316} 309}
317EXPORT_SYMBOL(set_dma_y_count); 310EXPORT_SYMBOL(set_dma_y_count);
318 311
@@ -322,7 +315,6 @@ void set_dma_x_modify(unsigned int channel, short x_modify)
322 && channel < MAX_BLACKFIN_DMA_CHANNEL)); 315 && channel < MAX_BLACKFIN_DMA_CHANNEL));
323 316
324 dma_ch[channel].regs->x_modify = x_modify; 317 dma_ch[channel].regs->x_modify = x_modify;
325 SSYNC();
326} 318}
327EXPORT_SYMBOL(set_dma_x_modify); 319EXPORT_SYMBOL(set_dma_x_modify);
328 320
@@ -332,7 +324,6 @@ void set_dma_y_modify(unsigned int channel, short y_modify)
332 && channel < MAX_BLACKFIN_DMA_CHANNEL)); 324 && channel < MAX_BLACKFIN_DMA_CHANNEL));
333 325
334 dma_ch[channel].regs->y_modify = y_modify; 326 dma_ch[channel].regs->y_modify = y_modify;
335 SSYNC();
336} 327}
337EXPORT_SYMBOL(set_dma_y_modify); 328EXPORT_SYMBOL(set_dma_y_modify);
338 329
@@ -342,7 +333,7 @@ void set_dma_config(unsigned int channel, unsigned short config)
342 && channel < MAX_BLACKFIN_DMA_CHANNEL)); 333 && channel < MAX_BLACKFIN_DMA_CHANNEL));
343 334
344 dma_ch[channel].regs->cfg = config; 335 dma_ch[channel].regs->cfg = config;
345 SSYNC(); 336
346} 337}
347EXPORT_SYMBOL(set_dma_config); 338EXPORT_SYMBOL(set_dma_config);
348 339
@@ -367,8 +358,6 @@ void set_dma_sg(unsigned int channel, struct dmasg *sg, int nr_sg)
367 dma_ch[channel].regs->cfg |= ((nr_sg & 0x0F) << 8); 358 dma_ch[channel].regs->cfg |= ((nr_sg & 0x0F) << 8);
368 359
369 dma_ch[channel].regs->next_desc_ptr = (unsigned int)sg; 360 dma_ch[channel].regs->next_desc_ptr = (unsigned int)sg;
370
371 SSYNC();
372} 361}
373EXPORT_SYMBOL(set_dma_sg); 362EXPORT_SYMBOL(set_dma_sg);
374 363
@@ -378,7 +367,6 @@ void set_dma_curr_addr(unsigned int channel, unsigned long addr)
378 && channel < MAX_BLACKFIN_DMA_CHANNEL)); 367 && channel < MAX_BLACKFIN_DMA_CHANNEL));
379 368
380 dma_ch[channel].regs->curr_addr_ptr = addr; 369 dma_ch[channel].regs->curr_addr_ptr = addr;
381 SSYNC();
382} 370}
383EXPORT_SYMBOL(set_dma_curr_addr); 371EXPORT_SYMBOL(set_dma_curr_addr);
384 372