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authorIngo Molnar <mingo@elte.hu>2009-02-13 03:44:22 -0500
committerIngo Molnar <mingo@elte.hu>2009-02-13 03:44:22 -0500
commitf8a6b2b9cee298a9663cbe38ce1eb5240987cb62 (patch)
treeb356490269c9e77d164dcc1477792b882fbb8bdb /arch/blackfin/include/asm/mem_init.h
parentba1511bf7fbda452138e4096bf10d5a382710f4f (diff)
parent071a0bc2ceace31266836801510879407a3701fa (diff)
Merge branch 'linus' into x86/apic
Conflicts: arch/x86/kernel/acpi/boot.c arch/x86/mm/fault.c
Diffstat (limited to 'arch/blackfin/include/asm/mem_init.h')
-rw-r--r--arch/blackfin/include/asm/mem_init.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/blackfin/include/asm/mem_init.h b/arch/blackfin/include/asm/mem_init.h
index 255a9316ad3..61f7487fbf1 100644
--- a/arch/blackfin/include/asm/mem_init.h
+++ b/arch/blackfin/include/asm/mem_init.h
@@ -115,7 +115,7 @@
115#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num) 115#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num)
116 116
117/* Enable SCLK Out */ 117/* Enable SCLK Out */
118#define mem_SDGCTL (0x80000000 | SCTLE | SDRAM_CL | SDRAM_tRAS | SDRAM_tRP | SDRAM_tRCD | SDRAM_tWR | PSS) 118#define mem_SDGCTL (SCTLE | SDRAM_CL | SDRAM_tRAS | SDRAM_tRP | SDRAM_tRCD | SDRAM_tWR | PSS)
119#else 119#else
120#define mem_SDRRC CONFIG_MEM_SDRRC 120#define mem_SDRRC CONFIG_MEM_SDRRC
121#define mem_SDGCTL CONFIG_MEM_SDGCTL 121#define mem_SDGCTL CONFIG_MEM_SDGCTL