diff options
author | Chandra Shekhar <x0044955@ti.com> | 2008-10-08 03:01:39 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2008-10-08 03:01:39 -0400 |
commit | b4b58f5834a023dab67201db9a626bef07bb200c (patch) | |
tree | 721917a3f675ba7f55ce6d8df0fef9f0a6ed88a5 /arch/arm/plat-omap/include/mach/mcbsp.h | |
parent | 25cef2251415cef5438e20965fec87096fe2efb0 (diff) |
ARM: OMAP: Allocate McBSP devices dynamically
Based on Chandra's earlier patches in linux-omap tree.
Note that omap1_mcbsp_check and omap2_mcbsp_check are no longer
needed as there's now omap_mcbsp_check_valid_id() defined.
Also some functions can now be marked __init.
Signed-off-by: Chandra Shekhar <x0044955@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap/include/mach/mcbsp.h')
-rw-r--r-- | arch/arm/plat-omap/include/mach/mcbsp.h | 33 |
1 files changed, 21 insertions, 12 deletions
diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h index a3074f2fb7c..46898faecb1 100644 --- a/arch/arm/plat-omap/include/mach/mcbsp.h +++ b/arch/arm/plat-omap/include/mach/mcbsp.h | |||
@@ -81,9 +81,6 @@ | |||
81 | #define OMAP_MCBSP_REG_XCERG 0x3A | 81 | #define OMAP_MCBSP_REG_XCERG 0x3A |
82 | #define OMAP_MCBSP_REG_XCERH 0x3C | 82 | #define OMAP_MCBSP_REG_XCERH 0x3C |
83 | 83 | ||
84 | #define OMAP_MAX_MCBSP_COUNT 3 | ||
85 | #define MAX_MCBSP_CLOCKS 3 | ||
86 | |||
87 | #define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1) | 84 | #define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1) |
88 | #define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1) | 85 | #define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1) |
89 | 86 | ||
@@ -91,12 +88,14 @@ | |||
91 | #define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX | 88 | #define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX |
92 | #define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX | 89 | #define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX |
93 | 90 | ||
94 | #elif defined(CONFIG_ARCH_OMAP24XX) | 91 | #elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
95 | 92 | ||
96 | #define OMAP_MCBSP_REG_DRR2 0x00 | 93 | #define OMAP_MCBSP_REG_DRR2 0x00 |
97 | #define OMAP_MCBSP_REG_DRR1 0x04 | 94 | #define OMAP_MCBSP_REG_DRR1 0x04 |
98 | #define OMAP_MCBSP_REG_DXR2 0x08 | 95 | #define OMAP_MCBSP_REG_DXR2 0x08 |
99 | #define OMAP_MCBSP_REG_DXR1 0x0C | 96 | #define OMAP_MCBSP_REG_DXR1 0x0C |
97 | #define OMAP_MCBSP_REG_DRR 0x00 | ||
98 | #define OMAP_MCBSP_REG_DXR 0x08 | ||
100 | #define OMAP_MCBSP_REG_SPCR2 0x10 | 99 | #define OMAP_MCBSP_REG_SPCR2 0x10 |
101 | #define OMAP_MCBSP_REG_SPCR1 0x14 | 100 | #define OMAP_MCBSP_REG_SPCR1 0x14 |
102 | #define OMAP_MCBSP_REG_RCR2 0x18 | 101 | #define OMAP_MCBSP_REG_RCR2 0x18 |
@@ -124,9 +123,9 @@ | |||
124 | #define OMAP_MCBSP_REG_RCERH 0x70 | 123 | #define OMAP_MCBSP_REG_RCERH 0x70 |
125 | #define OMAP_MCBSP_REG_XCERG 0x74 | 124 | #define OMAP_MCBSP_REG_XCERG 0x74 |
126 | #define OMAP_MCBSP_REG_XCERH 0x78 | 125 | #define OMAP_MCBSP_REG_XCERH 0x78 |
127 | 126 | #define OMAP_MCBSP_REG_SYSCON 0x8C | |
128 | #define OMAP_MAX_MCBSP_COUNT 2 | 127 | #define OMAP_MCBSP_REG_XCCR 0xAC |
129 | #define MAX_MCBSP_CLOCKS 2 | 128 | #define OMAP_MCBSP_REG_RCCR 0xB0 |
130 | 129 | ||
131 | #define AUDIO_MCBSP_DATAWRITE (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1) | 130 | #define AUDIO_MCBSP_DATAWRITE (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1) |
132 | #define AUDIO_MCBSP_DATAREAD (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1) | 131 | #define AUDIO_MCBSP_DATAREAD (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1) |
@@ -137,10 +136,6 @@ | |||
137 | 136 | ||
138 | #endif | 137 | #endif |
139 | 138 | ||
140 | #define OMAP_MCBSP_READ(base, reg) __raw_readw((base) + OMAP_MCBSP_REG_##reg) | ||
141 | #define OMAP_MCBSP_WRITE(base, reg, val) __raw_writew((val), (base) + OMAP_MCBSP_REG_##reg) | ||
142 | |||
143 | |||
144 | /************************** McBSP SPCR1 bit definitions ***********************/ | 139 | /************************** McBSP SPCR1 bit definitions ***********************/ |
145 | #define RRST 0x0001 | 140 | #define RRST 0x0001 |
146 | #define RRDY 0x0002 | 141 | #define RRDY 0x0002 |
@@ -151,6 +146,7 @@ | |||
151 | #define DXENA 0x0080 | 146 | #define DXENA 0x0080 |
152 | #define CLKSTP(value) ((value)<<11) /* bits 11:12 */ | 147 | #define CLKSTP(value) ((value)<<11) /* bits 11:12 */ |
153 | #define RJUST(value) ((value)<<13) /* bits 13:14 */ | 148 | #define RJUST(value) ((value)<<13) /* bits 13:14 */ |
149 | #define ALB 0x8000 | ||
154 | #define DLB 0x8000 | 150 | #define DLB 0x8000 |
155 | 151 | ||
156 | /************************** McBSP SPCR2 bit definitions ***********************/ | 152 | /************************** McBSP SPCR2 bit definitions ***********************/ |
@@ -228,6 +224,17 @@ | |||
228 | #define XPABLK(value) ((value)<<5) /* Bits 5:6 */ | 224 | #define XPABLK(value) ((value)<<5) /* Bits 5:6 */ |
229 | #define XPBBLK(value) ((value)<<7) /* Bits 7:8 */ | 225 | #define XPBBLK(value) ((value)<<7) /* Bits 7:8 */ |
230 | 226 | ||
227 | /*********************** McBSP XCCR bit definitions *************************/ | ||
228 | #define DILB 0x0020 | ||
229 | #define XDMAEN 0x0008 | ||
230 | #define XDISABLE 0x0001 | ||
231 | |||
232 | /********************** McBSP RCCR bit definitions *************************/ | ||
233 | #define RDMAEN 0x0008 | ||
234 | #define RDISABLE 0x0001 | ||
235 | |||
236 | /********************** McBSP SYSCONFIG bit definitions ********************/ | ||
237 | #define SOFTRST 0x0002 | ||
231 | 238 | ||
232 | /* we don't do multichannel for now */ | 239 | /* we don't do multichannel for now */ |
233 | struct omap_mcbsp_reg_cfg { | 240 | struct omap_mcbsp_reg_cfg { |
@@ -311,7 +318,6 @@ struct omap_mcbsp_spi_cfg { | |||
311 | struct omap_mcbsp_ops { | 318 | struct omap_mcbsp_ops { |
312 | void (*request)(unsigned int); | 319 | void (*request)(unsigned int); |
313 | void (*free)(unsigned int); | 320 | void (*free)(unsigned int); |
314 | int (*check)(unsigned int); | ||
315 | }; | 321 | }; |
316 | 322 | ||
317 | struct omap_mcbsp_platform_data { | 323 | struct omap_mcbsp_platform_data { |
@@ -353,6 +359,8 @@ struct omap_mcbsp { | |||
353 | struct omap_mcbsp_platform_data *pdata; | 359 | struct omap_mcbsp_platform_data *pdata; |
354 | struct clk *clk; | 360 | struct clk *clk; |
355 | }; | 361 | }; |
362 | extern struct omap_mcbsp **mcbsp_ptr; | ||
363 | extern int omap_mcbsp_count; | ||
356 | 364 | ||
357 | int omap_mcbsp_init(void); | 365 | int omap_mcbsp_init(void); |
358 | void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, | 366 | void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, |
@@ -377,5 +385,6 @@ void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg * | |||
377 | /* Polled read/write functions */ | 385 | /* Polled read/write functions */ |
378 | int omap_mcbsp_pollread(unsigned int id, u16 * buf); | 386 | int omap_mcbsp_pollread(unsigned int id, u16 * buf); |
379 | int omap_mcbsp_pollwrite(unsigned int id, u16 buf); | 387 | int omap_mcbsp_pollwrite(unsigned int id, u16 buf); |
388 | int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type); | ||
380 | 389 | ||
381 | #endif | 390 | #endif |